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export icache interface #264
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Links to coverage and verification reports for this PR (#264) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
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design/ifu/el2_ifu_ic_mem.sv|498|
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
verible-verilog-format
design/ifu/el2_ifu_ic_mem.sv|1042|
design/ifu/el2_ifu_ic_mem.sv|1076|
design/ifu/el2_ifu_ic_mem.sv|1079|
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design/ifu/el2_ifu_ic_mem.sv|1161|
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
verible-verilog-format
design/ifu/el2_ifu_ic_mem.sv|517|
design/ifu/el2_ifu_ic_mem.sv|526|
design/ifu/el2_ifu_ic_mem.sv|532|
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design/ifu/el2_ifu_ic_mem.sv|910|
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
verible-verilog-lint
design/ifu/el2_ifu_ic_mem.sv|1226 col 47| All generate block statements must have a label [Style: generate-statements] [generate-label]
design/ifu/el2_ifu_ic_mem.sv|1249 col 68| All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
design/ifu/el2_ifu_ic_mem.sv|1278 col 14| All generate block statements must have a label [Style: generate-statements] [generate-label]
design/ifu/el2_ifu_ic_mem.sv|1285 col 47| All generate block statements must have a label [Style: generate-statements] [generate-label]
design/ifu/el2_ifu_ic_mem.sv|1308 col 68| All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
design/ifu/el2_ifu_ic_mem.sv|1337 col 14| All generate block statements must have a label [Style: generate-statements] [generate-label]
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
verible-verilog-format
design/ifu/el2_ifu_ic_mem.sv|984|
design/ifu/el2_ifu_ic_mem.sv|986|
design/ifu/el2_ifu_ic_mem.sv|998|
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design/ifu/el2_ifu_ic_mem.sv|1006|
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design/ifu/el2_ifu_ic_mem.sv|1079|
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design/ifu/el2_ifu_ic_mem.sv|1097|
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design/ifu/el2_ifu_ic_mem.sv|1125|
design/ifu/el2_ifu_ic_mem.sv|1133|
design/ifu/el2_ifu_ic_mem.sv|1138|
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design/ifu/el2_ifu_ic_mem.sv|1279|
design/ifu/el2_ifu_ic_mem.sv|1286|
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Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit
verible-verilog-format
design/ifu/el2_ifu_ic_mem.sv|1163|
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Links to coverage and verification reports for this PR (#264) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
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LGTM
This exports the ICache signals outside of the veer core, aiming to solve #256.