Two input OR gate using NMOS load and NMOS as a driver with a Propagation Delay of 2 ns
transistor level schematic for CMOS/MOS implementation:-
Simulation Result using Microwind 3
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Mahekkumar-Varasada/Design-and-Simulation-of-NMOS-Based-OR-Gate
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Two input OR gate using NMOS load and NMOS as a driver with a Propagation Delay of 2 ns
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