Skip to content
View talhaiqbal-10xe's full-sized avatar

Block or report talhaiqbal-10xe

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. talhaiqbal-10xe talhaiqbal-10xe Public

    Config files for my GitHub profile.

  2. TrainingLabs TrainingLabs Public

    Jupyter Notebook

  3. demosiacing demosiacing Public

    Verilog

  4. RestoringDivider RestoringDivider Public

    Verilog

  5. buffer buffer Public

    This repo contains the address generating logic along with a parametrized buffer.

    Verilog

  6. CFA_RTL CFA_RTL Public

    Verilog