[#1548][vector crypto] adding register index LMUL alignement checks #1815
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… (vcrypto insn on element groups)
Documenting constrains at the macro definition level rather than at the macro call site. Co-authored-by: Nicolas Brunie <[email protected]> Signed-off-by: Nicolas Brunie <[email protected]>
Signed-off-by: Nicolas Brunie <[email protected]>
nibrunieAtSi5
commented
Sep 25, 2024
Signed-off-by: Nicolas Brunie <[email protected]>
…crypto .vs instructions
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Implementing @xinyuwang-starfive's feedback, #1548 (comment), in 028a174 Fixing the no-overlap constraints between |
nibrunie
reviewed
Oct 12, 2024
nibrunie
reviewed
Oct 12, 2024
Comment on lines
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+121
| int vd_emul = P.VU.vflmul < 1.f ? 1 : (int) P.VU.vflmul; \ | ||
| int aligned_vd = vd / vd_emul; \ | ||
| int aligned_vs2 = vs2 / vd_emul; \ | ||
| require(aligned_vd != aligned_vs2); \ |
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Could also be implemented by masking the log2(max(LMUL, 1)) LSBs of the register indices.
Need to check if there is not already a macro to perform this function.
Co-authored-by: Nicolas Brunie <[email protected]> Signed-off-by: Nicolas Brunie <[email protected]>
YenHaoChen
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Oct 28, 2024
Notice this is a local workaround fix. Please use riscv-software-src#1815 instead.
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This pull request implement two things:
.vsinstruction(a) the EMUL alignment of vector operand/destination (
=EMULfor the vector element group operands and the destination) is specified in the main RVV spec; when a vector register group is not EMUL aligned, the behavior is listed as "reserved" and spike has implemented this check to trigger illegal instruction exception when the condition was not met (e.g.riscv-isa-sim/riscv/v_ext_macros.h
Line 128 in de5094a
(b) is not specified clearly in the vector crypto specification (current version https://github.com/riscv/riscv-isa-manual/blob/7023c601443adf21850772e02e3d920bc68b2237/src/vector-crypto.adoc)
The vector crypto specification lists multiple times the intent to allow the vector register group for the scalar-element-group to have
EMUL = EGW / VLEN(and to be aligned with thisEMULand not with the globalLMULassociated with other vector operands/destination of the instruction).