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279 Open 593 Closed
279 Open 593 Closed
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Issues list

Running 483.xalancbmk in SPEC 2006 with error
#1883 opened Dec 22, 2024 by Ye-Jinhong
Couldn't find extension 'rocket' in shared library 'libcustomext.so'
#1874 opened Dec 11, 2024 by chenhychen
1
A/D updates when pa violates pmp check
#1873 opened Dec 11, 2024 by zhangjingru111
isa zve64x with doule & single floating-point extension
#1868 opened Dec 9, 2024 by alextxia13
1
Critique of #1853: the new get_csrs extension method is unnecessary, and has negative side effect
#1863 opened Nov 28, 2024 by liuyu81
13
Extracting SoftFloat
#1861 opened Nov 26, 2024 by v-ashwin
1
question: how to resolved the compiling error on centOS7
#1855 opened Nov 13, 2024 by shawn-xc
Mapping of vector elements by vector state
#1852 opened Nov 5, 2024 by Seo-sang
for vleff inst take breakpoint on not first element，does it need report breakpoint？
#1851 opened Nov 5, 2024 by xinyuwang-starfive
PMP backward-compatible defaults could be misleading
#1850 opened Nov 1, 2024 by caizixian
2
Support disassembling RoCC instructions
#1849 opened Nov 1, 2024 by caizixian
risv-gnu-toolchain spike module "Bad or missing arguments for command str"
#1845 opened Oct 27, 2024 by cryptolovi
the exception priority for atomic instructions
#1841 opened Oct 21, 2024 by NewPaulWalker
FIOM bit missing from MENVCFG mask
#1837 opened Oct 17, 2024 by vmoya-smd
1
priority between LCOFI and vs interrupt ?
#1832 opened Oct 12, 2024 by xinyuwang-starfive
2
What prevents to reach debug memory debug region while running in Machine mode?
#1827 opened Oct 1, 2024 by omerguzelelectronicguy
Error: terminate called after throwing an instance of 'trap_store_access_fault'
#1821 opened Sep 27, 2024 by shahbazahmad-96
Pointer Masking in M Mode with VM enabled not Working as intended
#1817 opened Sep 26, 2024 by MuhammadHammad001
How to forcefully inject the rtl values into spike
#1809 opened Sep 16, 2024 by IMVelige
1
Clarification on VMSEQ Instruction Behavior (riscv vector spec1.0)
#1808 opened Sep 15, 2024 by latifbhatti
1
Building spike with "--with-priv=m" config option renders spike unusable
#1802 opened Sep 11, 2024 by mkozden
13
SFENCE.VMA instruction privilege
#1798 opened Sep 9, 2024 by Seo-sang
1
RISC-V Standard Spec Trace Support
#1794 opened Aug 30, 2024 by iansseijelly
Logging the value of registers at a certain point during the simulation possible?
#1792 opened Aug 29, 2024 by AshvinVaidyanathan
1
trap instruction page fault error and mode shifting from M-mode to U-mode in spike debug mode
#1790 opened Aug 29, 2024 by kommarisurendra
ProTip! Exclude everything labeled bug with -label:bug.