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Fix read value of CSR mip.
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The read value of mip should only depend on the two bits, VSEIP and VSTIP of hvip.

This PR fix the read value of CSR mip when Sscofpmf extension enabled.

After implementing the Sscofpmf extension, hvip.LCOFIP became writable.
This caused an issue where the entire value of hvip was OR-ed when reading mip.

I revise the mip read logic to make it depend only on the hvip.VSEIP and hvip.VSTIP bits.

Co-authored-by: Zhaoyang You <[email protected]>
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NewPaulWalker and sinceforYy committed Dec 10, 2024
1 parent fe49242 commit a5699bf
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion riscv/csrs.cc
Original file line number Diff line number Diff line change
Expand Up @@ -781,7 +781,7 @@ mip_csr_t::mip_csr_t(processor_t* const proc, const reg_t addr):
}

reg_t mip_csr_t::read() const noexcept {
return val | state->hvip->basic_csr_t::read();
return val | (state->hvip->basic_csr_t::read() & (MIP_VSEIP | MIP_VSTIP));
}

void mip_csr_t::backdoor_write_with_mask(const reg_t mask, const reg_t val) noexcept {
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