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pulp-platform / tech_cells_generic Public

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Fork 30
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Pull requests: pulp-platform/tech_cells_generic

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Pull requests list

Waive Verilator linter for lints not matching our code style

#33 opened Mar 14, 2024 by SamuelRiedel

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tc_sram_xilinx: Select memory macro for FPGA

#32 opened Oct 12, 2023 by CyrilKoe

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1

tc_clk_xilinx.sv: Add IS_FUNCTIONAL parameter on clk_mux

#28 opened Jul 4, 2023 by CyrilKoe

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9

tc_sram: Remove 'X initialization for SimInit = "none"

#19 opened Jan 18, 2022 by micprog

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1

Padfunctional module with PU/PD signal control

#18 opened Nov 5, 2021 by mattsini1

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6

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