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fpga: ignore bufgmux in some cases
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CyrilKoe committed Jul 4, 2023
1 parent a9cae21 commit 6f43739
Showing 1 changed file with 16 additions and 7 deletions.
23 changes: 16 additions & 7 deletions src/fpga/tc_clk_xilinx.sv
Original file line number Diff line number Diff line change
Expand Up @@ -57,19 +57,28 @@ module tc_clk_inverter (

endmodule

module tc_clk_mux2 (
module tc_clk_mux2 #(
/// Using BUFGMUX on FPGA can allocate limited clock ressources
/// to non clock signals. It can be disabled with
/// IS_FUNCTIONAL = 0
parameter bit IS_FUNCTIONAL = 1'b0
)(
input logic clk0_i,
input logic clk1_i,
input logic clk_sel_i,
output logic clk_o
);

BUFGMUX i_BUFGMUX (
.S ( clk_sel_i ),
.I0 ( clk0_i ),
.I1 ( clk1_i ),
.O ( clk_o )
);
if (IS_FUNCTIONAL) begin
BUFGMUX i_BUFGMUX (
.S ( clk_sel_i ),
.I0 ( clk0_i ),
.I1 ( clk1_i ),
.O ( clk_o )
);
end else begin
assign clk_o = clk_sel_i ? clk1_i : clk0_i;
end

endmodule

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