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[HW] 🐛 Fix printf missing characters bug #343

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merged 3 commits into from
Aug 15, 2024
Merged

[HW] 🐛 Fix printf missing characters bug #343

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218c011
[hardware] :bug: Fix non-idempotent regions bug
mp-17 Aug 15, 2024
12618e2
[hardawre] Keep memory size constant with NrLanes
mp-17 Aug 15, 2024
9d802cc
[CHANGELOG] Update changelog
mp-17 Aug 15, 2024
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2 changes: 2 additions & 0 deletions CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
- Fix reshuffle mechanism
- Fix vstart usage for memory operations
- Fix fft, exp, softmax, roi_align performance
- Fix printf bug (missing characters) - UART and CTRL memory regions are now idempotent

### Added

Expand Down Expand Up @@ -47,6 +48,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
- VLEN is now a parameter of the ara architecture and does not depend on a define anymore
- vlen_t, as a consequence, is now define within the architecture as a parameter/localparam
- Refactor addrgen module
- Memory size is now constant with NrLanes

## 3.0.0 - 2023-09-08

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6 changes: 3 additions & 3 deletions hardware/src/ara_soc.sv
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Expand Up @@ -24,7 +24,7 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(
// AXI Resp Delay [ps] for gate-level simulation
parameter int unsigned AxiRespDelay = 200,
// Main memory
parameter int unsigned L2NumWords = 2**20,
parameter int unsigned L2NumWords = (2**22) / NrLanes,
// Dependant parameters. DO NOT CHANGE!
localparam type axi_data_t = logic [AxiDataWidth-1:0],
localparam type axi_strb_t = logic [AxiDataWidth/8-1:0],
Expand Down Expand Up @@ -494,8 +494,8 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(
CLICNumInterruptSrc : 0,
// idempotent region
NrNonIdempotentRules : 2,
NonIdempotentAddrBase: {64'b0, 64'b0},
NonIdempotentLength : {64'b0, 64'b0},
NonIdempotentAddrBase: {UARTBase, CTRLBase},
NonIdempotentLength : {UARTLength, CTRLLength},
NrExecuteRegionRules : 3,
// DRAM, Boot ROM, Debug Module
ExecuteRegionAddrBase: {DRAMBase, 64'h1_0000, 64'h0},
Expand Down
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