Skip to content

Issues: pulp-platform/ara

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

64 Open 127 Closed
64 Open 127 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

Assistance Needed for Sample Code with GDB Trace
#373 opened Nov 8, 2024 by johnodin99
Some Hardware Bug for vstu running imatmul bug Something isn't working
#369 opened Oct 29, 2024 by Rarity0123
@mp-17
1
make checkout in hardware/ fails
#367 opened Oct 24, 2024 by jerryz123
1
How to adding a custom RVV isa on ARA?
#366 opened Oct 13, 2024 by js4ngu
2
ara froze while running spmv. bug Something isn't working
#365 opened Oct 11, 2024 by hanyjie
'string.h' file not found when make bin/hello_world
#363 opened Oct 9, 2024 by hypertseng
3
Stride store has issues. bug Something isn't working
#361 opened Sep 30, 2024 by TimLee-123
There is a bug in the store instruction. bug Something isn't working
#360 opened Sep 30, 2024 by TimLee-123
I am getting 0 as cycle count when doing the spike simulations
#359 opened Sep 9, 2024 by Ajsat3801
2
Some problem of Vivado
#357 opened Sep 3, 2024 by AD738560581
3
There is a bug in the load instruction. bug Something isn't working
#355 opened Sep 2, 2024 by TimLee-123
Can we see the hardware usage rate in the simv?
#354 opened Aug 28, 2024 by rong-hash
fst waveform analyzing for imatmul program
#348 opened Aug 23, 2024 by Tanishqgithub
Conformal LEC Error: Error: RTL1.13: Mismatched enumeration types are in the assignment
#345 opened Aug 19, 2024 by csgxiong
2
vslideup instruction error bug Something isn't working
#340 opened Aug 5, 2024 by TimLee-123
1
Any User Specific C program on ARA
#334 opened Jul 26, 2024 by Tanishqgithub
2
ARA Synthesis using Cadence or Synopsys Tools
#333 opened Jul 24, 2024 by Vinay0203
1
Question of vwadd instruction bug Something isn't working
#327 opened Jul 18, 2024 by AD738560581
1
Similar issue as #320
#321 opened Jul 7, 2024 by Syedateeb24
2
Failed to execute Ideal Dispatcher mode
#320 opened Jul 6, 2024 by Vinay0203
2
Failed in RTL Simulation
#316 opened Jun 28, 2024 by kevin121121121
1
Failed in RTL Simulation
#314 opened Jun 26, 2024 by Tanishqgithub
25
The tail element does not follow the RVV SPEC requirements. bug Something isn't working
#303 opened May 22, 2024 by TimLee-123
1
Running Intel QuestaSim failing with error
#302 opened May 18, 2024 by magurmach
1
VID Instruction Error bug Something isn't working
#298 opened May 9, 2024 by TimLee-123
1
ProTip! Type g p on any issue or pull request to go back to the pull request listing page.