[SW] Add lavaMD benchmark

.github/workflows/ci.yml

@@ -300,7 +300,7 @@ jobs:
     strategy:
       max-parallel: 1
       matrix:
-        app:        [hello_world, imatmul, fmatmul, iconv2d, fconv2d, fconv3d, jacobi2d, dropout, fft, dwt, exp, softmax, dotproduct, fdotproduct, pathfinder, roi_align]
+        app:        [hello_world, imatmul, fmatmul, iconv2d, fconv2d, fconv3d, jacobi2d, dropout, fft, dwt, exp, softmax, dotproduct, fdotproduct, pathfinder, roi_align, lavamd]
         ara_config: [2_lanes, 4_lanes, 8_lanes, 16_lanes]
     needs: ["compile-ara", "compile-apps"]
     steps:
@@ -661,6 +661,11 @@ jobs:
       with:
         name: roi_align_roofline
         path: roi_align.png
+    - name: Upload the lavamd roofline
+      uses: actions/upload-artifact@v4
+      with:
+        name: lavamd_roofline
+        path: lavamd.png
 
 ####################
 #  Clean-up stage  #

CHANGELOG.md

@@ -43,6 +43,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
  - Add support for fault-only-first loads
  - Extend the riscv-tests MASKU-related tests
  - Add support for vrgather/vcompress
+ - Add lavaMD `app`, benchmark, and performance plot
 
 ### Changed
 

apps/benchmarks/benchmark/lavamd.bmark

@@ -0,0 +1,71 @@
+// Copyright 2020 ETH Zurich and University of Bologna.
+//
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//    http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Author: Matteo Perotti <[email protected]>
+
+#include "../kernel/lavamd.h"
+#include "runtime.h"
+#include "util.h"
+
+#ifndef SPIKE
+#include "printf.h"
+#else
+#include <stdio.h>
+#endif
+
+#ifndef WARM_CACHES_ITER
+#define WARM_CACHES_ITER 1
+#endif
+
+extern fp alpha;
+extern uint64_t n_boxes;
+extern uint64_t NUMBER_PAR_PER_BOX;
+
+extern box_str box_cpu_mem[]
+    __attribute__((aligned(4 * NR_LANES), section(".l2")));
+extern FOUR_VECTOR rv_cpu_mem[]
+    __attribute__((aligned(4 * NR_LANES), section(".l2")));
+extern fp qv_cpu_mem[] __attribute__((aligned(4 * NR_LANES), section(".l2")));
+extern FOUR_VECTOR fv_v_cpu_mem[]
+    __attribute__((aligned(4 * NR_LANES), section(".l2")));
+extern FOUR_VECTOR fv_s_cpu_mem[]
+    __attribute__((aligned(4 * NR_LANES), section(".l2")));
+extern nei_str nn_mem[] __attribute__((aligned(4 * NR_LANES), section(".l2")));
+
+void warm_caches(uint64_t heat) {
+  for (uint64_t k = 0; k < heat; ++k)
+    kernel_vec(alpha, n_boxes, box_cpu_mem, rv_cpu_mem, qv_cpu_mem, fv_s_cpu_mem,
+               NUMBER_PAR_PER_BOX);
+}
+
+int main() {
+#ifndef SPIKE
+  // Warm-up caches
+  warm_caches(WARM_CACHES_ITER);
+#endif
+
+  HW_CNT_READY;
+  start_timer();
+  kernel_vec(alpha, n_boxes, box_cpu_mem, rv_cpu_mem, qv_cpu_mem, fv_v_cpu_mem,
+             NUMBER_PAR_PER_BOX);
+  stop_timer();
+  HW_CNT_NOT_READY;
+
+  int64_t runtime = get_timer();
+  printf("[sw-cycles]: %ld\n", runtime);
+
+  return 0;
+}

apps/benchmarks/kernel/lavamd.c

@@ -0,0 +1 @@
+../../lavamd/kernel/lavamd.c

apps/benchmarks/kernel/lavamd.h

@@ -0,0 +1 @@
+../../lavamd/kernel/lavamd.h

apps/benchmarks/lib/exp.h

@@ -0,0 +1 @@
+../../exp/kernel/exp.h

apps/benchmarks/main.c

@@ -73,6 +73,9 @@
 #elif defined(ROI_ALIGN)
 #include "benchmark/roi_align.bmark"
 
+#elif defined(LAVAMD)
+#include "benchmark/lavamd.bmark"
+
 #else
 #error                                                                         \
     "Error, no kernel was specified. Please, run 'make bin/benchmarks ENV_DEFINES=-D${KERNEL}', where KERNEL contains the kernel to benchmark. For example: 'make bin/benchmarks ENV_DEFINES=-DIMATMUL'."

apps/common/default_args.mk

@@ -35,3 +35,5 @@ def_args_roi_align   ?= "1 32 4 4 4 2 2"
 def_args_spmv        ?= "128 128 0.6"
 # Conjugate gradient size and steps
 def_args_conjugate_gradient	?= "128 0 0.5"
+# box1d, particles_per_box, alpha, maxelm
+def_args_lavamd      ?= "2 32 0.5 128"

apps/common/rivec/vector_defines.h

@@ -6,6 +6,9 @@
 
 // RISC-V VECTOR intrinsics mapping by Cristóbal Ramírez Lazo, "Barcelona 2019"
 
+#ifndef _RIVEC_VECTOR_DEFINES_H_
+#define _RIVEC_VECTOR_DEFINES_H_
+
 #include "riscv_vector.h"
 
 /*
@@ -123,8 +126,31 @@
 #define _MM_VFLT_f64(op1, op2, vl) vmflt_vv_f64m1_b64(op1, op2, vl)
 #define _MM_VFLT_f32(op1, op2, vl) vmflt_vv_f32m1_b32(op1, op2, vl)
 
+#define _MM_VFSGNJN_f64(op1, op2, vl) vfsgnjn_vv_f64m1(op1, op2, vl)
+#define _MM_VFSGNJN_f32(op1, op2, vl) vfsgnjn_vv_f32m1(op1, op2, vl)
+
+#define _MM_REDSUM_f64(dest, vector, scalar, vl)                               \
+  vfredusum_vs_f64m1_f64m1(dest, vector, scalar, vl)
+#define _MM_REDSUM_f32(dest, vector, scalar, vl)                               \
+  vfredusum_vs_f32m1_f32m1(dest, vector, scalar, vl)
+
+/*
+  Memory Ops Intrinsics
+*/
+
+#define _MM_LOAD_f64(base, vl) vle64_v_f64m1(base, vl)
+#define _MM_LOAD_f32(base, vl) vle32_v_f32m1(base, vl)
+
+#define _MM_STORE_f64(base, value, vl) vse64_v_f64m1(base, value, vl)
+#define _MM_STORE_f32(base, value, vl) vse32_v_f32m1(base, value, vl)
+
+#define _MM_LOAD_STRIDE_f64(base, bstride, vl) vlse64_v_f64m1(base, bstride, vl)
+#define _MM_LOAD_STRIDE_f32(base, bstride, vl) vlse32_v_f32m1(base, bstride, vl)
+
 /*
   Ancillary Defines
 */
 
 #define FENCE() asm volatile("fence");
+
+#endif

apps/lavamd/LICENSE

@@ -0,0 +1,38 @@
+LICENSE TERMS
+
+Copyright (c)2008-2011 University of Virginia
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification, are permitted without royalty fees or other restrictions, provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+    * Neither the name of the University of Virginia, the Dept. of Computer Science, nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF VIRGINIA OR THE SOFTWARE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+If you use this software or a modified version of it, please cite the most relevant among the following papers:
+
+- M. A. Goodrum, M. J. Trotter, A. Aksel, S. T. Acton, and K. Skadron. Parallelization of Particle Filter Algorithms. In Proceedings
+of the 3rd Workshop on Emerging Applications and Many-core Architecture (EAMA), in conjunction with the IEEE/ACM International
+Symposium on Computer Architecture (ISCA), June 2010.
+
+- S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, Sang-Ha Lee and K. Skadron.
+"Rodinia: A Benchmark Suite for Heterogeneous Computing". IEEE International Symposium
+on Workload Characterization, Oct 2009.
+
+- J. Meng and K. Skadron. "Performance Modeling and Automatic Ghost Zone Optimization
+for Iterative Stencil Loops on GPUs." In Proceedings of the 23rd Annual ACM International
+Conference on Supercomputing (ICS), June 2009.
+
+- L.G. Szafaryn, K. Skadron and J. Saucerman. "Experiences Accelerating MATLAB Systems
+Biology Applications." in Workshop on Biomedicine in Computing (BiC) at the International
+Symposium on Computer Architecture (ISCA), June 2009.
+
+- M. Boyer, D. Tarjan, S. T. Acton, and K. Skadron. "Accelerating Leukocyte Tracking using CUDA:
+A Case Study in Leveraging Manycore Coprocessors." In Proceedings of the International Parallel
+and Distributed Processing Symposium (IPDPS), May 2009.
+
+- S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, and K. Skadron. "A Performance
+Study of General Purpose Applications on Graphics Processors using CUDA" Journal of
+Parallel and Distributed Computing, Elsevier, June 2008.

apps/lavamd/LICENSE_1

@@ -0,0 +1,28 @@
+Copyright (c) 2020, Barcelona Supercomputing Center
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met: redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer;
+redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution;
+neither the name of the copyright holders nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+If you use this software or a modified version of it for your research, please cite the paper:
+Cristóbal Ramírez, César Hernandez, Oscar Palomar, Osman Unsal, Marco Ramírez, and Adrián Cristal. 2020. A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures. ACM Trans. Archit. Code Optim. 17, 4, Article 38 (October 2020), 29 pages. https://doi.org/10.1145/3422667