[apps] Add fault-only-first load tests

pulp-platform · Dec 2, 2024 · c6c7a17 · c6c7a17
1 parent c9d1581
commit c6c7a17
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Showing 2 changed files with 22 additions and 21 deletions.
diff --git a/apps/riscv-tests/isa/rv64uv/Makefrag b/apps/riscv-tests/isa/rv64uv/Makefrag
@@ -143,6 +143,7 @@ rv64uv_sc_tests = vaadd \
                   vslide1down \
                   vfslide1down \
                   vl \
+                  vlff \
                   vlseg \
                   vlsseg \
                   vluxseg \
@@ -180,7 +181,7 @@ rv64uv_sc_tests = vaadd \
                   vfrec7 \
                   vfrsqrt7
 
-#rv64uv_sc_tests = vcompress vlff vrgather
+#rv64uv_sc_tests = vcompress vrgather
 
 rv64uv_p_tests = $(addprefix rv64uv-p-, $(rv64uv_sc_tests))
 

diff --git a/apps/riscv-tests/isa/rv64uv/vlff.c b/apps/riscv-tests/isa/rv64uv/vlff.c
@@ -10,57 +10,57 @@
 void TEST_CASE1(void) {
   VSET(4, e8, m1);
   volatile int8_t INP[] = {0xff, 0x00, 0x0f, 0xf0};
-  __asm__ volatile("vle8ff.v v1, (%0)" ::"r"(INP));
-  VEC_CMP_8(1, v1, 0xff, 0x00, 0x0f, 0xf0);
+  asm volatile("vle8ff.v v1, (%0)" ::"r"(INP));
+  VCMP_U8(1, v1, 0xff, 0x00, 0x0f, 0xf0);
 }
 
 void TEST_CASE2(void) {
   VSET(4, e8, m1);
   volatile int8_t INP[] = {0xff, 0x00, 0x0f, 0xf0};
   VLOAD_8(v0, 0x5, 0x0, 0x0, 0x0);
-  CLEAR(v1);
-  __asm__ volatile("vle8ff.v v1, (%0), v0.t" ::"r"(INP));
-  VEC_CMP_8(2, v1, 0xff, 0x00, 0x0f, 0x00);
+  VCLEAR(v1);
+  asm volatile("vle8ff.v v1, (%0), v0.t" ::"r"(INP));
+  VCMP_U8(2, v1, 0xff, 0x00, 0x0f, 0x00);
 }
 
 void TEST_CASE3(void) {
   VSET(3, e16, m1);
   volatile int16_t INP[] = {0xffff, 0x0000, 0x0f0f, 0xf0f0};
-  __asm__ volatile("vle16ff.v v1, (%0)" ::"r"(INP));
-  VEC_CMP_16(3, v1, 0xffff, 0x0000, 0x0f0f);
+  asm volatile("vle16ff.v v1, (%0)" ::"r"(INP));
+  VCMP_U16(3, v1, 0xffff, 0x0000, 0x0f0f);
 }
 
 void TEST_CASE4(void) {
   VSET(3, e16, m1);
   volatile int16_t INP[] = {0xffff, 0x0001, 0x0f0f, 0xf0f0};
   VLOAD_16(v0, 0x5, 0x0, 0x0, 0x0);
-  CLEAR(v1);
-  __asm__ volatile("vle16ff.v v1, (%0), v0.t" ::"r"(INP));
-  VEC_CMP_16(4, v1, 0xffff, 0x0000, 0x0f0f);
+  VCLEAR(v1);
+  asm volatile("vle16ff.v v1, (%0), v0.t" ::"r"(INP));
+  VCMP_U16(4, v1, 0xffff, 0x0000, 0x0f0f);
 }
 
 void TEST_CASE5(void) {
   VSET(4, e32, m1);
   volatile int32_t INP[] = {0xffffffff, 0x00000000, 0x0f0f0f0f, 0xf0f0f0f0};
-  __asm__ volatile("vle32ff.v v1, (%0)" ::"r"(INP));
-  VEC_CMP_32(5, v1, 0xffffffff, 0x00000000, 0x0f0f0f0f, 0xf0f0f0f0);
+  asm volatile("vle32ff.v v1, (%0)" ::"r"(INP));
+  VCMP_U32(5, v1, 0xffffffff, 0x00000000, 0x0f0f0f0f, 0xf0f0f0f0);
 }
 
 void TEST_CASE6(void) {
   VSET(4, e32, m1);
   volatile int32_t INP[] = {0xffffffff, 0x80000000, 0x0f0f0f0f, 0xf0f0f0f0};
   VLOAD_32(v0, 0x5, 0x0, 0x0, 0x0);
-  CLEAR(v1);
-  __asm__ volatile(" vle32ff.v v1, (%0), v0.t \n" ::"r"(INP));
-  VEC_CMP_32(6, v1, 0xffffffff, 0x0, 0x0f0f0f0f, 0x0);
+  VCLEAR(v1);
+  asm volatile(" vle32ff.v v1, (%0), v0.t \n" ::"r"(INP));
+  VCMP_U32(6, v1, 0xffffffff, 0x0, 0x0f0f0f0f, 0x0);
 }
 
 void TEST_CASE7(void) {
   VSET(4, e64, m1);
   volatile int64_t INP[] = {0xdeadbeefffffffff, 0xdeadbeef00000000,
                             0xdeadbeef0f0f0f0f, 0xdeadbeeff0f0f0f0};
-  __asm__ volatile("vle64ff.v v1,(%0)" ::"r"(INP));
-  VEC_CMP_64(7, v1, 0xdeadbeefffffffff, 0xdeadbeef00000000, 0xdeadbeef0f0f0f0f,
+  asm volatile("vle64ff.v v1,(%0)" ::"r"(INP));
+  VCMP_U64(7, v1, 0xdeadbeefffffffff, 0xdeadbeef00000000, 0xdeadbeef0f0f0f0f,
              0xdeadbeeff0f0f0f0);
 }
 
@@ -69,9 +69,9 @@ void TEST_CASE8(void) {
   volatile int64_t INP[] = {0xdeadbeefffffffff, 0xdeadbeef00000000,
                             0xdeadbeef0f0f0f0f, 0xdeadbeeff0f0f0f0};
   VLOAD_64(v0, 0x5, 0x0, 0x0, 0x0);
-  CLEAR(v1);
-  __asm__ volatile("vle64ff.v v1,(%0), v0.t" ::"r"(INP));
-  VEC_CMP_64(8, v1, 0xdeadbeefffffffff, 0x0000000000000000, 0xdeadbeef0f0f0f0f,
+  VCLEAR(v1);
+  asm volatile("vle64ff.v v1,(%0), v0.t" ::"r"(INP));
+  VCMP_U64(8, v1, 0xdeadbeefffffffff, 0x0000000000000000, 0xdeadbeef0f0f0f0f,
              0x0000000000000000);
 }