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Add backreferencing for simulation of Cheshire + Ara
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Signed-off-by: Moritz Imfeld <[email protected]>
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moimfeld authored and mp-17 committed Jul 18, 2024
1 parent b057e9d commit c3355df
Showing 1 changed file with 13 additions and 4 deletions.
17 changes: 13 additions & 4 deletions cheshire/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -11,16 +11,20 @@ MAKEFILE_DIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST))))
ARA_ROOT := $(MAKEFILE_DIR)/..
BACKREF_CHS_ROOT ?= $(realpath ../../../../..)
BACKREF_CHS_XIL_SCRIPTS := $(BACKREF_CHS_ROOT)/target/xilinx/scripts
BACKREF_CHS_SIM_SCRIPTS := $(BACKREF_CHS_ROOT)/target/sim/vsim/

# Tools
VIVADO ?= 'vitis-2020.2 vivado'

# Set up Bender targets and defines
# default configuration for Cheshire + Ara is 2_lanes
ARA_CONFIGURATION ?= 2_lanes
ARA_CONFIGURATION ?= 2_lanes
include $(ARA_ROOT)/config/$(ARA_CONFIGURATION).mk
BOARD := vcu128
CUSTOM_BENDER_TARGETS := -t fpga -t cv64a6_imafdcv_sv39 -t cva6 -t $(BOARD) --define ARA --define NR_LANES=$(nr_lanes) --define VLEN=$(vlen)
BOARD := vcu128
VLOG_ARGS ?= -suppress 2583 -suppress 13314
COMMON_CUSTOM_TARGETS := -t cv64a6_imafdcv_sv39 -t cva6 --define ARA --define NR_LANES=$(nr_lanes) --define VLEN=$(vlen)
CUSTOM_SIM_BENDER_TARGETS := $(COMMON_CUSTOM_TARGETS) -t sim -t test -t rtl --vlog-arg="$(VLOG_ARGS)"
CUSTOM_XIL_BENDER_TARGETS := $(COMMON_CUSTOM_TARGETS) -t fpga -t $(BOARD)

.PHONY: ara-chs-xilinx-$(BOARD) ara-chs-flash-$(BOARD) apply-patches update_xilinx_src clean

Expand All @@ -36,7 +40,12 @@ apply-patches:

update_xilinx_src:
cd $(BACKREF_CHS_ROOT) && \
bender script vivado $(CUSTOM_BENDER_TARGETS) > $(BACKREF_CHS_XIL_SCRIPTS)/add_sources.vcu128.tcl
bender script vivado $(CUSTOM_XIL_BENDER_TARGETS) > $(BACKREF_CHS_XIL_SCRIPTS)/add_sources.vcu128.tcl

update_vsim_src:
cd $(BACKREF_CHS_ROOT) && \
bender script vsim $(CUSTOM_SIM_BENDER_TARGETS) > $(BACKREF_CHS_SIM_SCRIPTS)/compile.cheshire_soc.tcl
echo 'vlog "$(realpath $(BACKREF_CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $(BACKREF_CHS_SIM_SCRIPTS)/compile.cheshire_soc.tcl

clean:
rm $(BACKREF_CHS_XIL_SCRIPTS)/add_sources.vcu128.tcl
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