Expose cheshire FPGA flash target to Ara

Signed-off-by: Moritz Imfeld <[email protected]>

cheshire/Makefile

@@ -12,6 +12,8 @@ ARA_ROOT                := $(MAKEFILE_DIR)/..
 BACKREF_CHS_ROOT        ?= $(realpath ../../../../..)
 BACKREF_CHS_XIL_SCRIPTS := $(BACKREF_CHS_ROOT)/target/xilinx/scripts
 
+# Tools
+VIVADO ?= 'vitis-2020.2 vivado'
 
 # Set up Bender targets and defines
 # default configuration for Cheshire + Ara is 2_lanes
@@ -20,11 +22,14 @@ include $(ARA_ROOT)/config/$(ARA_CONFIGURATION).mk
 BOARD                   := vcu128
 CUSTOM_BENDER_TARGETS   := -t fpga -t cv64a6_imafdcv_sv39 -t cva6 -t $(BOARD) --define ARA --define NR_LANES=$(nr_lanes) --define VLEN=$(vlen)
 
-.PHONY: ara-chs-xilinx-$(BOARD) update_xilinx_src clean
+.PHONY: ara-chs-xilinx-$(BOARD) ara-chs-flash-$(BOARD) update_xilinx_src clean
 
 ara-chs-xilinx-$(BOARD): update_xilinx_src
 	make -C $(BACKREF_CHS_ROOT) chs-xilinx-$(BOARD)
 
+ara-chs-flash-$(BOARD):
+	make -C $(BACKREF_CHS_ROOT) chs-xilinx-flash-$(BOARD) VIVADO=$(VIVADO)
+
 update_xilinx_src:
 	cd $(BACKREF_CHS_ROOT) && \
 	bender script vivado $(CUSTOM_BENDER_TARGETS) > $(BACKREF_CHS_XIL_SCRIPTS)/add_sources.vcu128.tcl