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[hardware] WIP: vrgather/vcompress
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@mp-17
mp-17 committed Nov 25, 2024
1 parent 5a324fa commit 82dca34
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Showing 6 changed files with 112 additions and 69 deletions.
20 changes: 17 additions & 3 deletions hardware/include/ara_pkg.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -963,10 +963,24 @@ package ara_pkg;
logic is_exception;
} addrgen_axi_req_t;

//////////////////////////
// VRGATHER / VCOMPRESS //
//////////////////////////

////////////////////////
// VFREC7 & VFRSQRT7 //
///////////////////////
// Indices are 16-bit at most because of RISC-V V VLEN limitation at 64Kibit
typedef logic [$clog2(rvv_pkg::RISCV_MAX_VLEN)-1:0] max_vlen_t;

// During VRGATHER/VCOMPRESS, the MASKU asks for operands to the lanes
typedef struct packed {
max_vlen_t idx;
rvv_pkg::vew_e eew;
logic [4:0] vs;
logic is_last_req;
} vrgat_req_t;

////////////////////////
// VFREC7 & VFRSQRT7 //
///////////////////////

localparam int unsigned LUT_BITS = 7;

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6 changes: 3 additions & 3 deletions hardware/src/ara.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -333,7 +333,7 @@ module ara import ara_pkg::*; #(
logic [NrLanes-1:0] masku_result_final_gnt;
logic [NrLanes-1:0] masku_vrgat_req_valid;
logic [NrLanes-1:0] masku_vrgat_req_ready;
vaddr_t masku_vrgat_addr;
vrgat_req_t masku_vrgat_req;

for (genvar lane = 0; lane < NrLanes; lane++) begin: gen_lanes
lane #(
Expand Down Expand Up @@ -407,7 +407,7 @@ module ara import ara_pkg::*; #(
.masku_result_final_gnt_o (masku_result_final_gnt[lane] ),
.masku_vrgat_req_valid_i (masku_vrgat_req_valid[lane] ),
.masku_vrgat_req_ready_o (masku_vrgat_req_ready[lane] ),
.masku_vrgat_addr_i (masku_vrgat_addr ),
.masku_vrgat_req_i (masku_vrgat_req ),
.mask_i (mask[lane] ),
.mask_valid_i (mask_valid[lane] & mask_valid_lane ),
.mask_ready_o (lane_mask_ready[lane] )
Expand Down Expand Up @@ -602,7 +602,7 @@ module ara import ara_pkg::*; #(
.masku_result_final_gnt_i(masku_result_final_gnt ),
.masku_vrgat_req_valid_o (masku_vrgat_req_valid ),
.masku_vrgat_req_ready_i (masku_vrgat_req_ready ),
.masku_vrgat_addr_o (masku_vrgat_addr ),
.masku_vrgat_req_o (masku_vrgat_req ),
// Interface with the VFUs
.mask_o (mask ),
.mask_valid_o (mask_valid ),
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11 changes: 6 additions & 5 deletions hardware/src/lane/lane.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,7 @@ module lane import ara_pkg::*; import rvv_pkg::*; #(
output logic masku_result_final_gnt_o,
input logic masku_vrgat_req_valid_i,
output logic masku_vrgat_req_ready_o,
input vaddr_t masku_vrgat_addr_i,
input vrgat_req_t masku_vrgat_req_i,
// Interface between the Mask unit and the VFUs
input strb_t mask_i,
input logic mask_valid_i,
Expand Down Expand Up @@ -252,7 +252,11 @@ module lane import ara_pkg::*; import rvv_pkg::*; #(
.alu_ready_i (alu_ready ),
.alu_vinsn_done_i (alu_vinsn_done ),
.mfpu_ready_i (mfpu_ready ),
.mfpu_vinsn_done_i (mfpu_vinsn_done )
.mfpu_vinsn_done_i (mfpu_vinsn_done ),
// From the MASKU - for VRGATHER/VCOMPRESS
.masku_vrgat_req_valid_i(masku_vrgat_req_valid_i ),
.masku_vrgat_req_ready_o(masku_vrgat_req_ready_o ),
.masku_vrgat_req_i (masku_vrgat_req_i )
);

/////////////////////////
Expand Down Expand Up @@ -340,9 +344,6 @@ module lane import ara_pkg::*; import rvv_pkg::*; #(
.masku_result_be_i (masku_result_be_i ),
.masku_result_gnt_o (masku_result_gnt_o ),
.masku_result_final_gnt_o (masku_result_final_gnt_o),
.masku_vrgat_req_valid_i (masku_vrgat_req_valid_i ),
.masku_vrgat_req_ready_o (masku_vrgat_req_ready_o ),
.masku_vrgat_addr_i (masku_vrgat_addr_i ),
// Slide Unit
.sldu_result_req_i (sldu_result_req_i ),
.sldu_result_id_i (sldu_result_id_i ),
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35 changes: 26 additions & 9 deletions hardware/src/lane/lane_sequencer.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
// Masku interface for vrgather/vcompress
input logic masku_vrgat_req_valid_i,
output logic masku_vrgat_req_ready_o,
input vaddr_t masku_vrgat_addr_i
);,
input vrgat_req_t masku_vrgat_req_i
);

////////////////////////////
// Register the request //
Expand Down Expand Up @@ -164,20 +164,20 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
typedef enum logic {IDLE, REQUESTING} vrgat_state_e;
vrgat_state_e vrgat_state_d, vrgat_state_q;

vaddr_t masku_vrgat_addr_q;
vrgat_req_t masku_vrgat_req_q;
logic masku_vrgat_req_ready_d, masku_vrgat_req_valid_q;

spill_register #(
.T ( vaddr_t )
) i_spill_register_vrgat_addr (
.T ( vrgat_req_t )
) i_spill_register_vrgat_req (
.clk_i,
.rst_ni,
.valid_i (masku_vrgat_req_valid_i),
.ready_o (masku_vrgat_req_ready_o),
.data_i (masku_vrgat_addr_i),
.data_i (masku_vrgat_req_i),
.valid_o (masku_vrgat_req_valid_q),
.ready_i (masku_vrgat_req_ready_d),
.data_o (masku_vrgat_addr_q)
.data_o (masku_vrgat_req_q)
);

always_comb begin
Expand All @@ -192,8 +192,10 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
end
end
REQUESTING: begin
// If the MASKU is over with VRGATHER/VCOMPRESS, return tu idle
if (masku_vrgat_end_q) begin
// Pop if the operand requester is ready to accept a request
masku_vrgat_req_ready_d = masku_vrgat_req_valid_q && !(operand_request_valid_o[MaskB]);
// If the MASKU is over with VRGATHER/VCOMPRESS, return to idle
if (masku_vrgat_req_ready_d && masku_vrgat_req_q.is_last_req) begin
vrgat_state_d = IDLE;
end
end
Expand Down Expand Up @@ -859,6 +861,21 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
default:;
endcase
end

// VRGATHER and VCOMPRESS access the opreq with ad-hoc requests
if (vrgat_state_q == REQUESTING) begin
// Here, we are sure the MaskB operand_request is free
operand_request[MaskB] = '{
vs : masku_vrgat_req_q.vs,
eew : masku_vrgat_req_q.eew,
scale_vl : 1'b0,
vl : 1,
vstart : masku_vrgat_req_q.idx,
hazard : '0,
default : '0
};
operand_request_push[MaskB] = masku_vrgat_req_valid_q && !(operand_request_valid_o[MaskB]);
end
end: sequencer

always_ff @(posedge clk_i or negedge rst_ni) begin: p_sequencer_ff
Expand Down
1 change: 0 additions & 1 deletion hardware/src/lane/operand_requester.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,6 @@ module operand_requester import ara_pkg::*; import rvv_pkg::*; #(
input strb_t masku_result_be_i,
output logic masku_result_gnt_o,
output logic masku_result_final_gnt_o,
output logic masku_result_final_gnt_o,
// Slide unit
input logic sldu_result_req_i,
input vid_t sldu_result_id_i,
Expand Down
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