[hardware, Bender] Bump dependencies

pulp-platform · Nov 3, 2023 · 42e6ee6 · 42e6ee6
1 parent 1bb8036
commit 42e6ee6
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Showing 4 changed files with 24 additions and 33 deletions.
diff --git a/Bender.lock b/Bender.lock
@@ -7,8 +7,7 @@ packages:
     dependencies:
     - common_cells
   ariane:
-  cva6:
-    revision: 3fddb6e5814604c7ec49e4320de0037292346c63
+    revision: b0d6f496910b3b8a0387134d5b91f7c8194bdf37
     version: null
     source:
       Git: https://github.com/pulp-platform/cva6.git
@@ -17,34 +16,27 @@ packages:
     - common_cells
     - fpnew
     - tech_cells_generic
-  apb:
-    revision: 77ddf073f194d44b9119949d2421be59789e69ae
-    version: 0.2.4
-    source:
-      Git: https://github.com/pulp-platform/apb.git
-    dependencies:
-    - common_cells
   axi:
-    revision: null
-    version: null
+    revision: 9251564ed67e3e71adf46dbeba62ef4435d2524c
+    version: 0.31.1
     source:
-      Path: hardware/deps/axi
+      Git: https://github.com/pulp-platform/axi.git
     dependencies:
     - common_cells
     - common_verification
   common_cells:
-    revision: null
-    version: null
+    revision: 2bd027cb87eaa9bf7d17196ec5f69864b35b630f
+    version: 1.32.0
     source:
-      Path: hardware/deps/common_cells
+      Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
     - common_verification
     - tech_cells_generic
   common_verification:
-    revision: null
-    version: null
+    revision: 9c07fa860593b2caabd9b5681740c25fac04b878
+    version: 0.2.3
     source:
-      Path: hardware/deps/common_verification
+      Git: https://github.com/pulp-platform/common_verification.git
     dependencies: []
   fpnew:
     revision: 3116391bf66660f806b45e212b9949c528b4e270
@@ -62,9 +54,9 @@ packages:
     dependencies:
     - common_cells
   tech_cells_generic:
-    revision: null
-    version: null
+    revision: 7968dd6e6180df2c644636bc6d2908a49f2190cf
+    version: 0.2.13
     source:
-      Path: hardware/deps/tech_cells_generic
+      Git: https://github.com/pulp-platform/tech_cells_generic.git
     dependencies:
     - common_verification
diff --git a/Bender.yml b/Bender.yml
@@ -8,11 +8,11 @@ package:
     - "Paul Scheffler <[email protected]>"
 
 dependencies:
-  axi:                { git: "https://github.com/pulp-platform/axi.git",                version: 0.29.1 }
-  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.22.1 }
-  cva6:               { git: "https://github.com/pulp-platform/cva6.git",               rev: acc_port_rerebase   }
-  tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.1  }
-  apb:                { git: "https://github.com/pulp-platform/apb.git",                version: 0.2.4  }
+  axi:                { git: "https://github.com/pulp-platform/axi.git",                version: 0.31.0      }
+  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.22.1      }
+  ariane:             { git: "https://github.com/pulp-platform/cva6.git",               rev: acc_port_rebase }
+  tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13      }
+  apb:                { git: "https://github.com/pulp-platform/apb.git",                version: 0.2.4       }
 
 workspace:
   checkout_dir: "hardware/deps"

diff --git a/hardware/Makefile b/hardware/Makefile
@@ -144,11 +144,11 @@ $(buildpath)/$(library):
 .PHONY: compile
 compile: dpi lib $(buildpath) bender $(buildpath)/compile_$(config).tcl
 $(buildpath)/compile_$(config).tcl: $(config_file) Makefile ../Bender.yml $(shell find src -type f) $(shell find ../config -type f) $(shell find include -type f) $(shell find tb -type f) $(shell find deps -type f)
-	./bender script vsim --vlog-arg="$(vlog_args)" -t rtl -t asic -t ara_test -t cva6_test -t cv64a6_imafdcv_sv39 $(bender_defs) > $(buildpath)/compile_$(config).tcl
+	$(BENDER) script vsim --vlog-arg="$(vlog_args)" -t rtl -t asic -t ara_test -t cva6_test -t cv64a6_imafdcv_sv39 -t tech_cells_generic_include_tc_sram -t tech_cells_generic_include_tc_clk $(bender_defs) > $(buildpath)/compile_$(config).tcl
 	echo "exit" >> $(buildpath)/compile_$(config).tcl
 	cd $(buildpath) && $(questa_cmd) vsim -work $(library) -c -do compile_$(config).tcl
-	# Remove the file if compilation did not succeed
-	if [ `cat $(buildpath)/transcript | grep "\*\* Error" | wc -l` -ne 0 ]; then rm $(buildpath)/compile_$(config).tcl; fi
+	# Rename the file if compilation did not succeed
+	if [ `cat $(buildpath)/transcript | grep "\*\* Error" | wc -l` -ne 0 ]; then mv $(buildpath)/compile_$(config).tcl $(buildpath)/compile_$(config).tcl.ERROR; fi
 
 # Simulation
 .PHONY: sim
@@ -176,7 +176,7 @@ verilate: $(buildpath) bender $(veril_library)/V$(veril_top)
 
 $(veril_library)/V$(veril_top): $(config_file) Makefile ../Bender.yml $(shell find src -type f) $(shell find ../config -type f) $(shell find include -type f) $(shell find tb -type f) $(shell find deps -type f)
 	rm -rf $(veril_library); mkdir -p $(veril_library)
-	./bender script verilator -t rtl -t ara_test -t cva6_test -t cv64a6_imafdcv_sv39 -t verilator $(bender_defs) > $(veril_library)/bender_script_$(config)
+	$(BENDER) script verilator -t rtl -t ara_test -t cva6_test -t cv64a6_imafdcv_sv39 -t verilator $(bender_defs) > $(veril_library)/bender_script_$(config)
 # Verilate the design
 	$(veril_path)/verilator -f $(veril_library)/bender_script_$(config)           \
   -GNrLanes=$(nr_lanes)                                                         \
@@ -194,8 +194,7 @@ $(veril_library)/V$(veril_top): $(config_file) Makefile ../Bender.yml $(shell fi
   -Wno-WIDTH                                                                    \
   -Wno-WIDTHCONCAT                                                              \
   -Wno-ENUMVALUE                                                                \
-  -Wno-COMBDLY
-     \
+  -Wno-COMBDLY                                                                  \
   -Wall                                                                         \
   --hierarchical                                                                \
   tb/verilator/waiver.vlt                                                       \

diff --git a/hardware/tb/dpi/elfloader.cc b/hardware/tb/dpi/elfloader.cc
@@ -1 +1 @@
-../../deps/cva6/corev_apu/tb/dpi/elfloader.cc
+../../deps/ariane/corev_apu/tb/dpi/elfloader.cc
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		../../deps/cva6/corev_apu/tb/dpi/elfloader.cc
		../../deps/ariane/corev_apu/tb/dpi/elfloader.cc