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[hardware] 🐛 Enable SIMD mul clock since op issue
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mp-17 committed Sep 6, 2023
1 parent e82dfca commit 2d15031
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion hardware/src/lane/vmfpu.sv
Original file line number Diff line number Diff line change
Expand Up @@ -298,7 +298,8 @@ module vmfpu import ara_pkg::*; import rvv_pkg::*; import fpnew_pkg::*;
.Z (clk_i_gated )
);

assign clkgate_en_d = vinsn_processing_d_valid & (vinsn_processing_d.op inside {[VMUL:VSMUL]});
assign clkgate_en_d = (vinsn_issue_q_valid & (vinsn_issue_q.op inside {[VMUL:VSMUL]}))
| (vinsn_processing_q_valid & (vinsn_processing_q.op inside {[VMUL:VSMUL]}));

elen_t [3:0] vmul_simd_result;
logic [3:0] vmul_simd_in_valid;
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