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[HW] A series of fixes to improve timing #2455

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Job	Run time
tc-isa-sim	35s
tc-gcc	50s
check-trailing-whitespaces	8s
check-license	28s
tc-llvm	1m 20s
tc-verilator	12s
compile-ara (2_lanes)	5s
compile-ara (4_lanes)	1s
compile-ara (8_lanes)	1s
compile-ara (16_lanes)	1s
check-clang-format	26s
compile-apps (2_lanes)	30s
compile-riscv-tests (2_lanes)	7s
compile-apps (4_lanes)	1s
compile-riscv-tests (4_lanes)	1s
compile-apps (8_lanes)	1s
compile-riscv-tests (8_lanes)	1s
compile-apps (16_lanes)	1s
compile-riscv-tests (16_lanes)	1s
riscv-tests-simv	0s
riscv-tests-spike	0s
benchmark	0s
simulate	0s
roofline	0s
clean-up	5s
clean-up-compile-runs (2_lanes)	6s
clean-up-compile-runs (4_lanes)	3s
clean-up-compile-runs (8_lanes)	4s
clean-up-compile-runs (16_lanes)	4s
	5m 12s