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Add ld/st priv mode, sum & PMP iface signals to acc_dispatcher #1767

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4 changes: 4 additions & 0 deletions core/acc_dispatcher.sv
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,10 @@ module acc_dispatcher
output logic acc_fflags_valid_o,
output logic [4:0] acc_fflags_o,
// Interface with the CSRs
input priv_lvl_t ld_st_priv_lvl_i,
input logic sum_i,
input pmpcfg_t [15:0] pmpcfg_i,
input logic [15:0][PLEN-3:0] pmpaddr_i,
input logic [2:0] fcsr_frm_i,
output logic dirty_v_state_o,
// Interface with the issue stage
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4 changes: 4 additions & 0 deletions core/cva6.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1138,6 +1138,10 @@ module cva6
.acc_cons_en_i (acc_cons_en_csr),
.acc_fflags_valid_o (acc_resp_fflags_valid),
.acc_fflags_o (acc_resp_fflags),
.ld_st_priv_lvl_i (ld_st_priv_lvl_csr_ex),
.sum_i (sum_csr_ex),
.pmpcfg_i (pmpcfg),
.pmpaddr_i (pmpaddr),
.fcsr_frm_i (frm_csr_id_issue_ex),
.dirty_v_state_o (dirty_v_state),
.issue_instr_i (issue_instr_id_acc),
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