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Add the Zc* ISA to "Applicable Specifications" #1615

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Nov 23, 2023
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Add the Zc* ISA to "Applicable Specifications" #1615

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Add the Zc* ISA to "Applicable Specifications"
MikeOpenHWGroup Nov 9, 2023
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Update cva6_requirements_specification.rst: embedded part number
jquevremont Nov 22, 2023
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Change D and I cache information
JeanRochCoulon Nov 22, 2023
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8 changes: 7 additions & 1 deletion docs/02_cva6_requirements/cva6_requirements_specification.rst
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Expand Up @@ -138,11 +138,13 @@ The CVA6 is highly configurable via SystemVerilog parameters.
It is not practical to fully document and verify all possible combinations of parameters, so a set of "viable IP configurations" has been defined.
The full list of parameters for this configuration will be detailed in the users’ guide.

Below is the configuration of the first release of the CVA6.
Below are the configuration of the first releases of the CVA6.

+--------------------+---------+---------+------+-------+---------+---------+---------+---------+
| Release ID | Target | ISA | XLEN | FPU | CV-X-IF | MMU | L1 D$ | L1 I$ |
+====================+=========+=========+======+=======+=========+=========+=========+=========+
| CV32A60B | ASIC | IMC | 32 | No | Yes | None | None | None |
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Following a Cores TG meeting:
CV32A60B is not accepted as the "embedded" configuration is not an application core.
The following part numbers are proposed:

  • CV32E60X if we keep the single issue
  • CV32E6?X (e.g. CV32E62X, CV32E65X...) if the configuration includes the dual issue, to reflect the higher performance. (My side note: don't use CV32E64X that would surely bring confusion).

I suggest to replace CV32A60X by CV32E6?X for this document and we'll update when the single-issue/dual-issue configuration is decived.

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Do we need to call it "Embedded", "CV32A60B", "CV32E62X", "CV32E65X", "CV32E60X" or "CV32E6?X" What a mess !!

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I have updated the PR with a proposal.

+--------------------+---------+---------+------+-------+---------+---------+---------+---------+
| CV32A60X | ASIC | IMC | 32 | No | Yes | Sv32 | None | 16 kB |
+--------------------+---------+---------+------+-------+---------+---------+---------+---------+

Expand Down Expand Up @@ -191,6 +193,10 @@ Asanović and John Hauser, RISC-V Foundation, December 4, 2021.
[RVdbg] “RISC-V External Debug Support, Document Version 0.13.2”,
Editors Tim Newsome and Megan Wachs, RISC-V Foundation, March 22, 2019.

[RVZc] “RISC-V Zc* Code Size Reduction v1.0",
Editor Tariq Kurd, Codasip, April, 2023.
https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions

[RVcompat] “RISC-V Architectural Compatibility Test Framework”,
https://github.com/riscv-non-isa/riscv-arch-test.

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