Add the Zc* ISA to "Applicable Specifications" #1615
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@Gchauvon The I$ and D$ are present in CV32A60B, can you add a commit to indicate the configuration you have currently implemented. |
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| +--------------------+---------+---------+------+-------+---------+---------+---------+---------+ | ||
| | Release ID | Target | ISA | XLEN | FPU | CV-X-IF | MMU | L1 D$ | L1 I$ | | ||
| +====================+=========+=========+======+=======+=========+=========+=========+=========+ | ||
| | CV32A60B | ASIC | IMC | 32 | No | Yes | None | None | None | |
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Following a Cores TG meeting:
CV32A60B is not accepted as the "embedded" configuration is not an application core.
The following part numbers are proposed:
- CV32E60X if we keep the single issue
- CV32E6?X (e.g. CV32E62X, CV32E65X...) if the configuration includes the dual issue, to reflect the higher performance. (My side note: don't use CV32E64X that would surely bring confusion).
I suggest to replace CV32A60X by CV32E6?X for this document and we'll update when the single-issue/dual-issue configuration is decived.
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Do we need to call it "Embedded", "CV32A60B", "CV32E62X", "CV32E65X", "CV32E60X" or "CV32E6?X" What a mess !!
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I have updated the PR with a proposal.
jquevremont
added
the
Component:Doc
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@MikeOpenHWGroup With you respect, I have updated directly into your branch some cache information. @jquevremont can you merge ? |
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During the CVA6 Verification meeting today (2023-11-09) it was pointed out that we have not defined the version of the Zc* ISA extension we support. This is a recently ratified spec. and it is not easy to find, so this PR (attempts to) resolve that.
Since I was already editing the
cva6_requirements_specification.rstdoc, I took the liberty of adding the CV32A60B, although I am not sure if the configuration information I added is correct.