csr: Make fiom only writeable if S-Mode exists

openhwgroup · Nov 23, 2023 · 8683b25 · 8683b25
1 parent 6754b05
commit 8683b25
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/core/csr_regfile.sv b/core/csr_regfile.sv
@@ -850,7 +850,7 @@ module csr_regfile
           mask  = riscv::MIP_SSIP | riscv::MIP_STIP | riscv::MIP_SEIP;
           mip_d = (mip_q & ~mask) | (csr_wdata & mask);
         end
-        riscv::CSR_MENVCFG: fiom_d <= csr_wdata[0];
+        riscv::CSR_MENVCFG: if (CVA6Cfg.RVS) fiom_d <= csr_wdata[0];
         riscv::CSR_MENVCFGH: begin
           if (riscv::XLEN != 32) update_access_exception = 1'b1;
         end