[verible-verilog-format] reported by reviewdog 🐶 Raw Output: core/decoder.sv:108:- imm_select = NOIMM; core/decoder.sv:109:- is_control_flow_instr_o = 1'b0; core/decoder.sv:110:- illegal_instr = 1'b0; core/decoder.sv:111:- illegal_instr_non_bm = 1'b0; core/decoder.sv:112:- illegal_instr_bm = 1'b0; core/decoder.sv:113:- illegal_instr_zic = 1'b0; core/decoder.sv:114:- instruction_o.pc = pc_i; core/decoder.sv:115:- instruction_o.trans_id = '0; core/decoder.sv:116:- instruction_o.fu = NONE; core/decoder.sv:117:- instruction_o.op = ariane_pkg::ADD; core/decoder.sv:118:- instruction_o.rs1 = '0; core/decoder.sv:119:- instruction_o.rs2 = '0; core/decoder.sv:120:- instruction_o.rd = '0; core/decoder.sv:121:- instruction_o.use_pc = 1'b0; core/decoder.sv:122:- instruction_o.is_compressed = is_compressed_i; core/decoder.sv:123:- instruction_o.is_zcmp_instr = is_zcmp_instr_i; core/decoder.sv:108:+ imm_select = NOIMM; core/decoder.sv:109:+ is_control_flow_instr_o = 1'b0; core/decoder.sv:110:+ illegal_instr = 1'b0; core/decoder.sv:111:+ illegal_instr_non_bm = 1'b0; core/decoder.sv:112:+ illegal_instr_bm = 1'b0; core/decoder.sv:113:+ illegal_instr_zic = 1'b0; core/decoder.sv:114:+ instruction_o.pc = pc_i; core/decoder.sv:115:+ instruction_o.trans_id = '0; core/decoder.sv:116:+ instruction_o.fu = NONE; core/decoder.sv:117:+ instruction_o.op = ariane_pkg::ADD; core/decoder.sv:118:+ instruction_o.rs1 = '0; core/decoder.sv:119:+ instruction_o.rs2 = '0; core/decoder.sv:120:+ instruction_o.rd = '0; core/decoder.sv:121:+ instruction_o.use_pc = 1'b0; core/decoder.sv:122:+ instruction_o.is_compressed = is_compressed_i; core/decoder.sv:123:+ instruction_o.is_zcmp_instr = is_zcmp_instr_i;

[verible-verilog-format] reported by reviewdog 🐶 Raw Output: core/decoder.sv:125:- instruction_o.is_mv_zcmp_instr = is_mv_zcmp_instr_i; core/decoder.sv:126:- instruction_o.use_zimm = 1'b0; core/decoder.sv:127:- instruction_o.bp = branch_predict_i; core/decoder.sv:128:- instruction_o.vfp = 1'b0; core/decoder.sv:129:- ecall = 1'b0; core/decoder.sv:130:- ebreak = 1'b0; core/decoder.sv:131:- check_fprm = 1'b0; core/decoder.sv:125:+ instruction_o.is_mv_zcmp_instr = is_mv_zcmp_instr_i; core/decoder.sv:126:+ instruction_o.use_zimm = 1'b0; core/decoder.sv:127:+ instruction_o.bp = branch_predict_i; core/decoder.sv:128:+ instruction_o.vfp = 1'b0; core/decoder.sv:129:+ ecall = 1'b0; core/decoder.sv:130:+ ebreak = 1'b0; core/decoder.sv:131:+ check_fprm = 1'b0;