Migrate some passes to Mini passes

engine/runtime-compiler/src/main/scala/org/enso/compiler/pass/PassManager.scala

@@ -1,5 +1,6 @@
 package org.enso.compiler.pass
 
+import org.slf4j.LoggerFactory
 import org.enso.compiler.context.{InlineContext, ModuleContext}
 import org.enso.compiler.core.ir.{Expression, Module}
 import org.enso.compiler.core.CompilerError
@@ -20,7 +21,8 @@ class PassManager(
   passes: List[PassGroup],
   passConfiguration: PassConfiguration
 ) {
-  val allPasses = verifyPassOrdering(passes.flatMap(_.passes))
+  private val logger = LoggerFactory.getLogger(classOf[PassManager])
+  val allPasses      = verifyPassOrdering(passes.flatMap(_.passes))
 
   /** Computes a valid pass ordering for the compiler.
     *
@@ -89,7 +91,26 @@ class PassManager(
 
     val passesWithIndex = passGroup.passes.zipWithIndex
 
-    passesWithIndex.foldLeft(ir) {
+    logger.debug(
+      "runPassesOnModule[{}@{}]",
+      moduleContext.getName(),
+      moduleContext.module.getCompilationStage()
+    )
+    var pendingMiniPasses: List[MiniPassFactory] = List()
+    def flushMiniPass(in: Module): Module = {
+      if (pendingMiniPasses.nonEmpty) {
+        val miniPasses = pendingMiniPasses.map(factory =>
+          factory.createForModuleCompilation(newContext)
+        )
+        val combinedPass = miniPasses.fold(null)(MiniIRPass.combine)
+        logger.trace("  flushing pending mini pass: {}", combinedPass)
+        pendingMiniPasses = List()
+        MiniIRPass.compile(classOf[Module], in, combinedPass)
+      } else {
+        in
+      }
+    }
+    val res = passesWithIndex.foldLeft(ir) {
       case (intermediateIR, (pass, index)) => {
         // TODO [AA, MK] This is a possible race condition.
         passConfiguration
@@ -100,13 +121,36 @@ class PassManager(
 
         pass match {
           case miniFactory: MiniPassFactory =>
-            val miniPass = miniFactory.createForModuleCompilation(newContext)
-            MiniIRPass.compile(classOf[Module], intermediateIR, miniPass)
+            logger.trace(
+              "  mini collected: {}",
+              pass
+            )
+            val combiningPreventedBy = pendingMiniPasses.find { p =>
+              p.asInstanceOf[IRPass].invalidatedPasses.contains(miniFactory)
+            }
+            val irForRemainingMiniPasses = if (combiningPreventedBy.isDefined) {
+              logger.trace(
+                "  pass {} forces flush before {}",
+                combiningPreventedBy.orNull,
+                miniFactory
+              )
+              flushMiniPass(intermediateIR)
+            } else {
+              intermediateIR
+            }
+            pendingMiniPasses = pendingMiniPasses.appended(miniFactory)
+            irForRemainingMiniPasses
           case _ =>
-            pass.runModule(intermediateIR, newContext)
+            val flushedIR = flushMiniPass(intermediateIR)
+            logger.trace(
+              "  mega running: {}",
+              pass
+            )
+            pass.runModule(flushedIR, newContext)
         }
       }
     }
+    flushMiniPass(res)
   }
 
   /** Executes all passes on the [[Expression]].
@@ -157,11 +201,7 @@ class PassManager(
         pass match {
           case miniFactory: MiniPassFactory =>
             val miniPass = miniFactory.createForInlineCompilation(newContext)
-            MiniIRPass.compile(
-              classOf[Expression],
-              intermediateIR,
-              miniPass
-            )
+            MiniIRPass.compile(classOf[Expression], intermediateIR, miniPass)
           case _ =>
             pass.runExpression(intermediateIR, newContext)
         }

engine/runtime-compiler/src/main/scala/org/enso/compiler/pass/desugar/LambdaShorthandToLambdaMini.scala

@@ -23,41 +23,42 @@ class LambdaShorthandToLambdaMini(
     parent: IR,
     current: Expression
   ): LambdaShorthandToLambdaMini = {
+    if (shouldSkipBlanks(parent)) {
+      new LambdaShorthandToLambdaMini(freshNameSupply, true)
+    } else {
+      this
+    }
+  }
+
+  private def shouldSkipBlanks(parent: IR): Boolean = {
     parent match {
       case Application.Prefix(fn, args, _, _, _) =>
         val hasBlankArg = args.exists {
           case CallArgument.Specified(_, _: Name.Blank, _, _) => true
           case _                                              => false
         }
         val hasBlankFn = fn.isInstanceOf[Name.Blank]
-        if (hasBlankArg || hasBlankFn) {
-          new LambdaShorthandToLambdaMini(freshNameSupply, true)
-        } else {
-          this
-        }
+        hasBlankArg || hasBlankFn
       case Application.Sequence(items, _, _) =>
         val hasBlankItem = items.exists {
           case _: Name.Blank => true
           case _             => false
         }
-        if (hasBlankItem) {
-          new LambdaShorthandToLambdaMini(freshNameSupply, true)
-        } else {
-          this
-        }
+        hasBlankItem
       case Case.Expr(_: Name.Blank, _, _, _, _) =>
-        new LambdaShorthandToLambdaMini(freshNameSupply, true)
-      case _ => this
+        true
+      case _ => false
     }
   }
 
   override def transformExpression(ir: Expression): Expression = {
-    ir match {
+    val newIr = ir match {
       case name: Name          => desugarName(name)
       case app: Application    => desugarApplication(app)
       case caseExpr: Case.Expr => desugarCaseExpr(caseExpr)
       case _                   => ir
     }
+    newIr
   }
 
   /** Desugars an arbitrary name occurrence, turning isolated occurrences of

engine/runtime-compiler/src/main/scala/org/enso/compiler/pass/desugar/OperatorToFunction.scala

@@ -24,7 +24,8 @@ case object OperatorToFunction extends IRPass with MiniPassFactory {
   override lazy val invalidatedPasses: Seq[IRPass] = List(
     AliasAnalysis,
     DataflowAnalysis,
-    DemandAnalysis
+    DemandAnalysis,
+    LambdaShorthandToLambda
   )
 
   override def runModule(