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Processor Design & Implementation

Past due by 7 months 0% complete

The following should be complete:

  • Clock Design
  • Overall Control Signals (ex: regwrite, regdst, jump etc.)
  • Multiplexors (alusrc, pcsrc, mem2reg)
  • Main Decoder Details
  • ALU Decoder
  • R-Type Instruction Impl.
  • I-Type Instruction Impl.
  • J-Type Instruction Impl.
  • PC – Increment for R- and I-types
  • PC – Increment for J-type
  • PC – Increment for Cond Branch
  • Datapath Desig…

The following should be complete:

  • Clock Design
  • Overall Control Signals (ex: regwrite, regdst, jump etc.)
  • Multiplexors (alusrc, pcsrc, mem2reg)
  • Main Decoder Details
  • ALU Decoder
  • R-Type Instruction Impl.
  • I-Type Instruction Impl.
  • J-Type Instruction Impl.
  • PC – Increment for R- and I-types
  • PC – Increment for J-type
  • PC – Increment for Cond Branch
  • Datapath Design (imem, dmem, alu, regfile, signext, sll)
  • PC increment adders (pc+1 adder, pc+jump adder, shift logical left)
  • Register File
  • Sign Entender(s)
  • ALU (and,or,nor,add,sub,slt)
  • Controller – Datapath Integration
  • Program Load Integration
  • Provided Assembly Program in code
  • minimum of a Hand-compiled Program into machine code for your ISA
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