[ipemu] gate dpi call with !reset to work around verilator scheduling…

… bug
chipsalliance · Jul 28, 2024 · 1de77d0 · 1de77d0
1 parent 9096c7d
commit 1de77d0
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/ipemu/src/TestBench.scala b/ipemu/src/TestBench.scala
@@ -112,7 +112,7 @@ class TestBench(generator: SerializableModuleGenerator[T1, T1Parameter]) extends
     val issue = WireDefault(0.U.asTypeOf(new Issue))
     val fence = RegInit(false.B)
     val outstanding = RegInit(0.U(4.W))
-    val doIssue: Bool = dut.request.ready && !fence
+    val doIssue: Bool = dut.request.ready && !fence && !reset
     // used to gate Xprop when DPI hasn't issued yet.
     val didIssue = RegNext(doIssue, false.B)
     outstanding := outstanding + (doIssue && (issue.meta === 1.U)) - dut.response.valid