[ipemu] try to workaround xprop for DPI

chipsalliance · Jul 28, 2024 · 9096c7d · 9096c7d
1 parent ce52e16
commit 9096c7d
Showing 1 changed file with 9 additions and 4 deletions.
diff --git a/ipemu/src/TestBench.scala b/ipemu/src/TestBench.scala
@@ -108,16 +108,21 @@ class TestBench(generator: SerializableModuleGenerator[T1, T1Parameter]) extends
       val writeRd: UInt = UInt(32.W)
       val vxsat: UInt = UInt(32.W)
     }
+    // X gated by didIssue
     val issue = WireDefault(0.U.asTypeOf(new Issue))
     val fence = RegInit(false.B)
     val outstanding = RegInit(0.U(4.W))
     val doIssue: Bool = dut.request.ready && !fence
+    // used to gate Xprop when DPI hasn't issued yet.
+    val didIssue = RegNext(doIssue, false.B)
     outstanding := outstanding + (doIssue && (issue.meta === 1.U)) - dut.response.valid
     fence := Mux(doIssue, issue.meta === 2.U, fence && !dut.response.valid && !(outstanding === 0.U))
-
-    issue := RawClockedNonVoidFunctionCall("issue_vector_instruction", new Issue)(
-      clock,
-      doIssue,
+    issue := Mux(didIssue,
+      RawClockedNonVoidFunctionCall("issue_vector_instruction", new Issue)(
+        clock,
+        doIssue,
+      ),
+      0.U.asTypeOf(new Issue)
     )
     dut.request.bits.instruction := issue.instruction
     dut.request.bits.src1Data := issue.src1Data