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Build(deps): Bump third_party/yosys from `98b4aff` to `6f3376c` (#2684) #6075

Job	Run time
Emit Workflow Info	0s
Build tools	10m 29s
Build Synlig Release	11m 11s
Build Plugin	10m 49s
Style check	1m 34s
Build Synlig (ASAN)	13m 8s
Verify README Correctness (Installation From Sources)	27m 44s
Build Package	13m 40s
Build PySynlig	15m 57s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)	11m 36s
Large Designs Tests / Black Parrot (ASIC synthesis)	11m 40s
Formal Verification Tests / simple	11m 44s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs	6m 33s
Formal Verification Tests / sv2v	11m 45s
Formal Verification Tests / yosys	11m 48s
Large Designs Tests / Ibex (Vivado synthesis)	6m 18s
Large Designs Tests / Black Parrot (AMD (Xilinx) with PySynlig)	11m 43s
Large Designs Tests / Ibex (F4PGA synthesis)	11m 42s
Large Designs Tests / Opentitan 9d82960888 (synthesis)	11m 44s
Large Designs Tests / Opentitan parsing (full/top-down)	11m 44s
Large Designs Tests / Opentitan (synthesis)	11m 47s
Large Designs Tests / Opentitan parsing (quick)	6m 23s
Large Designs Tests / VeeR-EH1 (synthesis)	5m 27s
Parsing Tests / Test read_systemverilog release	4m 16s
Parsing Tests / Test read_uhdm release	4m 34s
Parsing Tests / Test read_systemverilog plugin	4m 33s
Parsing Tests / Test read_uhdm plugin	4m 36s
Parsing Tests / Test read_systemverilog asan	11m 44s
Parsing Tests / Test read_uhdm asan	11m 52s
Parsing Tests / Generate AST diff	1s
Parsing Tests / Summary Generation	1s
Release Package	1s
Verify README Correctness (Download And Run Release)	1s
	4h 48m 5s

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