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Removing black-parrot-tools and black-parrot-sdk #6064

Job	Run time
Build Synlig Release	4m 59s
Build Plugin	4m 23s
Build Synlig (ASAN)	8m 10s
Build Package	4m 53s
Build PySynlig	10m 24s
Build tools	10m 44s
Emit Workflow Info	0s
Style check	1m 32s
Verify README Correctness (Installation From Sources)	41m 22s
Parsing Tests / Test read_systemverilog release	4m 35s
Parsing Tests / Test read_uhdm release	4m 12s
Large Designs Tests / Ibex (Vivado synthesis)	6m 29s
Large Designs Tests / Opentitan 9d82960888 (synthesis)	33m 39s
Parsing Tests / Test read_systemverilog plugin	4m 36s
Large Designs Tests / Opentitan (synthesis)	56m 50s
Parsing Tests / Test read_uhdm plugin	4m 17s
Parsing Tests / Test read_systemverilog asan	35m 27s
Diff generated BSG Micro Designs tests / Parse and diff BSG Micro Designs	6m 29s
Large Designs Tests / Black Parrot (ASIC synthesis)	9m 55s
Parsing Tests / Test read_uhdm asan	25m 35s
Large Designs Tests / Black Parrot (AMD (Xilinx) FPGA synthesis)	11m 40s
Large Designs Tests / Black Parrot (AMD (Xilinx) with PySynlig)	34m 23s
Large Designs Tests / Ibex (F4PGA synthesis)	12m 27s
Large Designs Tests / Opentitan parsing (full/top-down)	11m 39s
Large Designs Tests / Opentitan parsing (quick)	5m 2s
Large Designs Tests / VeeR-EH1 (synthesis)	5m 16s
Formal Verification Tests / simple	17m 22s
Formal Verification Tests / sv2v	17m 8s
Formal Verification Tests / yosys	14m 41s
Parsing Tests / Summary Generation	1m 46s
Parsing Tests / Generate AST diff	0s
Release Package	0s
Verify README Correctness (Download And Run Release)	0s
	6h 49m 55s

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