Use generic coverage pragmas

Signed-off-by: Tomasz Gorochowik <[email protected]>

design/dbg/el2_dbg.sv

@@ -65,24 +65,24 @@ import el2_pkg::*;
    output logic                        sb_axi_awvalid,
    input  logic                        sb_axi_awready,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [pt.SB_BUS_TAG-1:0]    sb_axi_awid,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    output logic [31:0]                 sb_axi_awaddr,
    output logic [3:0]                  sb_axi_awregion,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [7:0]                  sb_axi_awlen,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    output logic [2:0]                  sb_axi_awsize,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [1:0]                  sb_axi_awburst,
    output logic                        sb_axi_awlock,
    output logic [3:0]                  sb_axi_awcache,
    output logic [2:0]                  sb_axi_awprot,
    output logic [3:0]                  sb_axi_awqos,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 
    output logic                        sb_axi_wvalid,
    input  logic                        sb_axi_wready,
@@ -98,30 +98,30 @@ import el2_pkg::*;
    output logic                        sb_axi_arvalid,
    input  logic                        sb_axi_arready,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [pt.SB_BUS_TAG-1:0]    sb_axi_arid,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    output logic [31:0]                 sb_axi_araddr,
    output logic [3:0]                  sb_axi_arregion,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [7:0]                  sb_axi_arlen,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    output logic [2:0]                  sb_axi_arsize,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic [1:0]                  sb_axi_arburst,
    output logic                        sb_axi_arlock,
    output logic [3:0]                  sb_axi_arcache,
    output logic [2:0]                  sb_axi_arprot,
    output logic [3:0]                  sb_axi_arqos,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 
    input  logic                        sb_axi_rvalid,
    /* exclude signals that are tied to constant value in this file */
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    output logic                        sb_axi_rready,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    input  logic [63:0]                 sb_axi_rdata,
    input  logic [1:0]                  sb_axi_rresp,
 
@@ -134,9 +134,9 @@ import el2_pkg::*;
    input logic                         dbg_rst_l,
    input logic                         clk_override,
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input logic                         scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 );
 
 
@@ -555,7 +555,7 @@ import el2_pkg::*;
                      dbg_state_en            = dmstatus_reg[17];             // resume ack has been updated in the dmstatus register
            end
            /* All legal values are handled above. Exclude the default part from coverage. */
-           /*verilator coverage_off*/
+           /*pragma coverage off*/
            default : begin
                      dbg_nxtstate            = IDLE;
                      dbg_state_en            = 1'b0;
@@ -570,7 +570,7 @@ import el2_pkg::*;
                      sb_abmem_cmd_done_en    = 1'b0;
                      sb_abmem_data_done_en   = 1'b0;
           end
-          /*verilator coverage_on*/
+          /*pragma coverage on*/
          endcase
    end // always_comb begin
 
@@ -684,7 +684,7 @@ import el2_pkg::*;
                      sbaddress0_reg_wren1   = sbcs_reg[16] & (sbcs_reg[14:12] == 3'b0);    // auto increment was set and no error. Update to new address after completing the current command
             end
             /* All legal values are handled above. Exclude the default part from coverage. */
-            /*verilator coverage_off*/
+            /*pragma coverage off*/
             default : begin
                      sb_nxtstate            = SBIDLE;
                      sb_state_en            = 1'b0;
@@ -694,7 +694,7 @@ import el2_pkg::*;
                      sbcs_sberror_din[2:0]  = 3'b0;
                      sbaddress0_reg_wren1   = 1'b0;
            end
-            /*verilator coverage_on*/
+            /*pragma coverage on*/
          endcase
    end // always_comb begin
 

design/dec/el2_dec.sv

@@ -321,9 +321,9 @@ module el2_dec
 
     output logic dec_tlu_i0_commit_cmt,  // committed i0 instruction
     // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-    /*verilator coverage_off*/
+    /*pragma coverage off*/
     input  logic scan_mode               // Flop scan mode control
-    /*verilator coverage_on*/
+    /*pragma coverage on*/
 
 );
 

design/dec/el2_dec_decode_ctl.sv

@@ -197,9 +197,9 @@ import el2_pkg::*;
    output logic       dec_div_active,                 // non-block divide is active
 
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input  logic       scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    );
 
 

design/dec/el2_dec_gpr_ctl.sv

@@ -40,9 +40,9 @@ import el2_pkg::*;
     output logic [31:0] rd1,
 
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
     input  logic        scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 );
 
    logic [31:1] [31:0] gpr_out;      // 31 x 32 bit GPRs

design/dec/el2_dec_pmp_ctl.sv

@@ -59,9 +59,9 @@ module el2_dec_pmp_ctl
    output logic [31:0]      pmp_pmpaddr [pt.PMP_ENTRIES],
 
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input  logic        scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    );
 
    logic wr_pmpcfg_r;

design/dec/el2_dec_tlu_ctl.sv

@@ -34,9 +34,9 @@ import el2_pkg::*;
    input logic free_l2clk,
    input logic rst_l,
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input logic scan_mode,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 
    input logic [31:1] rst_vec, // reset vector, from core pins
    input logic        nmi_int, // nmi pin
@@ -3034,9 +3034,9 @@ import el2_pkg::*;
    output logic        dec_timer_t1_pulse, // timer1 int
 
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input  logic        scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
    );
    localparam MITCTL_ENABLE             = 0;
    localparam MITCTL_ENABLE_HALTED      = 1;

design/dmi/rvjtag_tap.v

@@ -30,27 +30,27 @@ output              wr_en,
 output              rd_en,
 
 input   [31:0]      rd_data,
-/*verilator coverage_off*/
+/*pragma coverage off*/
 input   [1:0]       rd_status,
-/*verilator coverage_on*/
+/*pragma coverage on*/
 
 output  reg         dmi_reset,
 output  reg         dmi_hard_reset,
 
-/*verilator coverage_off*/
+/*pragma coverage off*/
 input   [2:0]       idle,
 input   [1:0]       dmi_stat,
-/*verilator coverage_on*/
+/*pragma coverage on*/
 /*
 --  revisionCode        : 4'h0;
 --  manufacturersIdCode : 11'h45;
 --  deviceIdCode        : 16'h0001;
 --  order MSB .. LSB -> [4 bit version or revision] [16 bit part number] [11 bit manufacturer id] [value of 1'b1 in LSB]
 */
-/*verilator coverage_off*/
+/*pragma coverage off*/
 input   [31:1]      jtag_id,
 input   [3:0]       version
-/*verilator coverage_on*/
+/*pragma coverage on*/
 );
 
 localparam USER_DR_LENGTH = AWIDTH + 34;

design/el2_dma_ctrl.sv

@@ -32,9 +32,9 @@ import el2_pkg::*;
    input logic         dma_bus_clk_en, // slave bus clock enable
    input logic         clk_override,
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input logic         scan_mode,
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 
    // Debug signals
    input logic [31:0]  dbg_cmd_addr,

design/el2_mem.sv

@@ -85,9 +85,9 @@ import el2_pkg::*;
    el2_mem_if.veer_icache_src icache_export,
 
    // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-   /*verilator coverage_off*/
+   /*pragma coverage off*/
    input  logic         scan_mode
-   /*verilator coverage_on*/
+   /*pragma coverage on*/
 
 );
 

design/el2_pic_ctrl.sv

@@ -48,9 +48,9 @@ import el2_pkg::*;
                      output logic [31:0]            picm_rd_data,         // Read data of the register
                      output logic                   mhwakeup,             // Wake-up interrupt request
                      // Excluding scan_mode from coverage as its usage is determined by the integrator of the VeeR core.
-                     /*verilator coverage_off*/
+                     /*pragma coverage off*/
                      input  logic                   scan_mode             // scan mode
-                     /*verilator coverage_on*/
+                     /*pragma coverage on*/
 
 );
 

design/el2_pmp.sv

@@ -25,9 +25,9 @@ module el2_pmp
 ) (
     input logic clk,       // Top level clock
     input logic rst_l,     // Reset
-    /* verilator coverage_off */
+    /* pragma coverage off */
     input logic scan_mode, // Scan mode
-    /* verilator coverage_on */
+    /* pragma coverage on */
 
 `ifdef RV_SMEPMP
     input el2_mseccfg_pkt_t mseccfg, // mseccfg CSR content, RLB, MMWP and MML bits
@@ -115,9 +115,9 @@ module el2_pmp
         2'b11: result =
              (pmp_req_type == EXEC) |
             ((pmp_req_type == READ) & ~priv_mode);
-        /* verilator coverage_off */
+        /* pragma coverage off */
         default: ;
-        /* verilator coverage_on */
+        /* pragma coverage on */
       endcase
     end else begin
       if (csr_pmp_cfg.read & csr_pmp_cfg.write & csr_pmp_cfg.execute & csr_pmp_cfg.lock) begin