Removed unused imports, fixed typos

Internal-tag: [#49748] Signed-off-by: Maciej Kurc <[email protected]>
chipsalliance · Oct 4, 2023 · 97c3da2 · 97c3da2
1 parent 676477c
commit 97c3da2
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Showing 2 changed files with 1 addition and 6 deletions.
diff --git a/verification/block/iccm/test_readwrite.py b/verification/block/iccm/test_readwrite.py
@@ -3,7 +3,6 @@
 import random
 
 import pyuvm
-from cocotb.triggers import ClockCycles
 from pyuvm import *
 from testbench import BaseTest, MemReadItem, MemWriteItem
 

diff --git a/verification/block/iccm/testbench.py b/verification/block/iccm/testbench.py
@@ -1,12 +1,8 @@
 # Copyright (c) 2023 Antmicro
 # SPDX-License-Identifier: Apache-2.0
 
-import math
 import os
-import random
-import struct
 
-import pyuvm
 from cocotb.clock import Clock
 from cocotb.triggers import ClockCycles, FallingEdge, RisingEdge
 from pyuvm import *
@@ -246,7 +242,7 @@ def __init__(self, name, parent, env_class=BaseEnv):
         super().__init__(name, parent)
         self.env_class = env_class
 
-        # Syncrhonize pyuvm logging level with cocotb logging level. Unclear
+        # Synchronize pyuvm logging level with cocotb logging level. Unclear
         # why it does not happen automatically.
         level = logging.getLevelName(os.environ.get("COCOTB_LOG_LEVEL", "INFO"))
         uvm_report_object.set_default_logging_level(level)