RISC-V port fixes (part I) #2518
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We don't need to have compel/arch/riscv64/plugins/std/syscalls/syscalls.S tracked in git. It is autogenerated. We also need to update our .gitignore to ignore autogenerated files with syscall tables. Signed-off-by: Alexander Mikhalitsyn <[email protected]>
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Earlier I mentioned that I had experienced not only |
We need to dynamically calculate TASK_SIZE depending on the MMU on RISC-V system. [We are using analogical approach on aarch64/ppc64le.] This change was tested on physical machine: StarFive VisionFive 2 isa : rv64imafdc_zicntr_zicsr_zifencei_zihpm_zca_zcd_zba_zbb mmu : sv39 uarch : sifive,u74-mc mvendorid : 0x489 marchid : 0x8000000000000007 mimpid : 0x4210427 hart isa : rv64imafdc_zicntr_zicsr_zifencei_zihpm_zca_zcd_zba_zbb Signed-off-by: Alexander Mikhalitsyn <[email protected]>
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| unsigned long task_size; | ||
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| for (task_size = TASK_SIZE_MIN; task_size < TASK_SIZE_MAX; task_size <<= 1) | ||
| if (munmap((void *)task_size, page_size())) |
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I merged it because I was thinking that I'd reviewed it already.
I think this munamp can unmap something useful and trigger sigsegv.
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Hmm, actually, we are using the same approach for other architectures:
criu/compel/arch/arm/src/lib/infect.c
Line 184 in 1452c76
criu/compel/arch/ppc64/src/lib/infect.c
Line 507 in 1452c76
But that's an interesting point and probably I should try to find a cleaner way to determine a task size across all architectures we have then.
But taking into account that it's not a new and dirty hack I introduced but rather reusing an existing and time-proven method I think it's good enough to be there.
Upd: A first thing that comes into my mind is to replace munmap with some "safer" syscall like madvise. But it's still requires investigation...
Upd: we can also do mmap before munmap.
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We can do something like this: https://cs.opensource.google/gvisor/gvisor/+/master:pkg/abi/linux/mm.go;l=142?q=tasksize&ss=gvisor%2Fgvisor
Some follow-up fixes for CRIU port on RISC-V.
cc @ancientmodern @Cryolitia @felicitia