Information about DS-5 & Genode

README.md

@@ -1,65 +1,6 @@
-# DS-5
-<!-- FMC = FPGA Mezzanine Card (FMC) -->
+# Zedboard Tracing
 
-According to [Arm Developer][1] the TPIO lines from the Xilinx SoC must be routed out to the appropriate expansion header (for off-chip parallel trace).
-Proposed solution for the ZC702 can be found [here][2] and the Master answer record [here][3].
-From there one can find an example design for the ZED board, available [here][4].
-According to the [Arm DSTREAM User Guide][5] from the [DS-5 docs][6] using the Mictor cable should be enough for both debugging and tracing.
-
-# [Vivado Constraints][12]
-- Written in tcl
-- LOC => Location Constraints
-  > Places a logical element from the netlist to a site on the device
-
-- PACKAGE_PIN
-  > Specifies the location of a design port on a pin of the target device package.
-
-- IOSTANDARD
-  > IOSTANDARD sets an IO Standard to an I/O buffer instance.
-
-# Troubleshoot
-> Top module not set for fileset 'sources_1'.
-
-Right-click on the BD in the sources window and click "Generate HDL wrapper" - taken from [here][7].
-
-# Fix ZED Design
-Pin layout is different for ZC702 and ZED Board.
-According to the ZED board [schematics][8] (page 9) D21 and E21 connect to FMC_LA27 which is mapped to the J20 Connector on the MX105, instead of J16.
-See also the [schematics][9] of the ZC702 as reference (page 7).
-Therefore B15 should be used for PJTAG_TMS and C15 should be used for PJTAG_TCK instead.
-Additionally it makes sense to use B16 for PJTAG_TDI and B17 for PJTAG_TDO.
-As additional reference use the FMC XM105 [doc][10] and look at the J16 and J20 Connector.
-To understand the connection of the TRACE_DATA pins on (e.g. TRACE_DATA[0] -> PIN38 -> FMC_LA10_P), take a look at the [Mictor 38 pinouts documentation][11].
-
-# Wiring
-The PJTAG is routed to the J16 connector on the XM105 and must be connected to the J19 connector (which loops through to the Mictor connector):
-- TCK: J16-6 -> J19-4
-- TMS: J16-8 -> J19-9
-- TDI: J16-10 -> J19-7
-- TDO: J16-12 -> J19-6
-
-# Trace with DS-5
-Use pause instead of stop tracing, otherwise unknown address/instructions errors are observable.
-
-# Exkurs MIO und EMIO
-## MIO
-The I/O Peripherals (IOP) unit contains the data communication peripherals and communicates to external devices through a shared pool of up to 54 dedicated multiuse I/O (MIO) pins.
-These MIO pins are software-configurable to connect to any of the internal I/O peripherals and static memory controllers.
-If additional I/O pins beyond the 54 are required, it is possible to route these through the PL to the I/O associated with the PL.
-This feature is referred to as extendable multiplexed I/O (EMIO).
-
-## EMIO
-Extendable multiplexed I/O (EMIO) allows unmapped PS peripherals to access PL I/O.
-
-[1]: https://developer.arm.com/docs/137812646/latest/using-ds-5-with-xilinx-zynq-7000-devices
-[2]: https://www.xilinx.com/support/answers/46915.html
-[3]: https://www.xilinx.com/support/answers/50863.html
-[4]: https://www.xilinx.com/support/answers/52095.html
-[5]: https://static.docs.arm.com/100955/0529/arm_ds5_arm_dstream_user_guide_100955_0529_00_en.pdf
-[6]: https://developer.arm.com/products/software-development-tools/ds-5-development-studio/docs
-[7]: https://forums.xilinx.com/t5/Welcome-Join/Error-Common-17-70-Application-Exception/td-p/776328
-[8]: https://www.xilinx.com/support/documentation/university/XUP%20Boards/XUPZedBoard/documentation/ZedBoard_RevC.1_Schematic_130129.pdf
-[9]: https://www.xilinx.com/support/documentation/boards_and_kits/zc702_Schematic_xtp185_rev1_0.pdf
-[10]: https://www.xilinx.com/support/documentation/boards_and_kits/ug537.pdf
-[11]: https://developer.arm.com/docs/dui0499/latest/arm-dstream-target-interface-connections/the-mictor-38-connector-pinouts-and-interface-signals/mictor-38-pinouts
-[12]: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_2/ug903-vivado-using-constraints.pdf
+1. [Hardware Installation](hardware.md)
+2. [Genode Tracing](genode_tracing.md)
+3. [Linux Tracing](linux_tracing.md)
+4. [Genode Streamline](genode_streamline.md)

genode_streamline.md

@@ -0,0 +1,33 @@
+# Streamline
+
+From [Streamline Performance Analyzer User Guide](/docs/streamline_user_guide_100769_0607_00_en.pdf)
+> Streamline Performance Analyzer samples the Program Counter (PC) address at regular intervals to
+> generate a profile of where the processor spends most of the time. It also gathers data from performance
+> monitoring unit (PMU) counters on the target, for example data on memory or cache activity, and
+> generates an analysis report.
+
+![Streamline](/img/streamline00.png)
+
+Streamline requires an agent, called gator, to be installed and running on the target.
+gator consists of the following components:
+
+* A daemon, gatord .
+* Optionally, a Linux kernel driver module, gator.ko .
+
+The role of **gator.ko** is to collect data from the operating system and
+applications that are running on the target. gatord reads and processes this
+data, and creates a directory, whose name ends in .apc , containing the capture
+data.
+
+gatord must be installed and running on the target to allow Streamline to
+communicate with the target.  However, gatord can run with or without gator.ko .
+
+gator can operate in the following modes:
+
+* Kernel space gator
+* User space gator
+  * using linux *perf* API
+  * polling */proc*
+
+As all these APIs are not available in Genode, it is not an ease to port
+[gator](https://github.com/ARM-software/gator) to Genode.

genode_tracing.md

@@ -0,0 +1,150 @@
+
+# Configuration
+
+## Debug Symbols
+Genode loads `hello_client`, `hello_server` and `init` at fixed
+addresses. Theses are printed to the terminal at the boot.
+
+![Debugger](/img/config00.png)
+
+It is important that DS-5 is able to load these binaries. Furthermore, the
+binaries must contain debug symbols. In order to check, if binaries are
+unstripped, run:
+
+```bash
+$ file hello_client 
+hello_client: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), statically linked, with debug_info, not stripped
+```
+
+You can find necessary unstripped binaries in [/binaries/genode-hello-world](/binaries/genode-hello-world).
+
+
+## OS Awareness
+
+![OS Awareness](/img/config01.png)
+
+## Connection
+
+![Connection](/img/config02.png)
+
+## Files
+
+![Files](/img/config03.png)
+
+# SD-Card
+
+All necessary files for the sdcard are in
+[/sdcard/genode-hello-world/](/sdcard/genode-hello-world/)
+
+# Tracing
+
+1. Start DS-5.
+2. Connect to UART with `minicom`. `screen` did not work and often freezed. You
+   can extend DS-5 by a local terminal window and run minicom there.
+
+   ```bash
+   sudo minicom -D /dev/USB0
+   ```
+
+3. Power on the Zedboard. Due to unknown reasons several characters are printed
+   to the terminal. Press a key in order to open the u-boot console.
+
+4. Flash the tracing core to the FPGA by running following command in u-boot:
+
+	```
+	fatload mmc 0:1 ${scriptaddr} tracing.bit; fpga loadb 0 ${scriptaddr}
+	9000000
+	```
+
+	Optionally add this command to the u-boot enviroment and run it with `run
+    tracing`:
+
+	```
+	setenv tracing 'fatload mmc 0:1 ${scriptaddr} tracing.bit; fpga loadb 0
+	${scriptaddr} 9000000'
+	```
+
+5. Enable the Connection in the Debug Control Window.
+   ![Disconnected](/img/tracing00.png)
+   ![Disconnected](/img/tracing01.png)
+
+
+6. DS-5 is ready to trace. The trace window shows, that the `Buffer Used` is
+   zero. During tracing, the used buffer will increase. In order to start
+   tracing, press the button `Start Capture` in the trace view.
+   ![Fullscreen](/img/tracing02.png)
+
+7. Boot Genode by executing the command `boot` in u-boot.
+
+8. ![Record Trace](/img/tracing03.png)
+
+9. In order to stop tracing, press the Pause Button in the Debug View. Both CPU
+   cores stop. ![Stopped CPUs](/img/tracing04.png). It is not possible to
+   restart the CPU cores. Power off the Zedboard and continue with step 3 again.
+
+
+# Breakpoint View
+
+![Enable Breakpoint](/img/breakpoint00.png)
+![Breakpoint List](/img/breakpoint01.png)
+![Breakpoint Commands Output](/img/breakpoint02.png)
+
+# Memory View
+
+![Memory](/img/memory00.png)
+
+# Stack View
+
+DS-5 is not able to trace executed functions in the stack view. This might be
+caused by two reasons:
+* missing OS awareness
+* only active with gdb
+Regarding this, the documentation of DS-5 is not clear.
+
+![Stack](/img/stack00.png)
+
+# Functions View
+
+If binaries (compiled with debug symbols) are loaded sucessfully, DS-5 will list
+all functions. 
+
+![Functions](/img/functions00.png)
+
+# Register View
+
+![Registers](/img/registers00.png)
+
+# Trace View
+
+![Trace](/img/trace00.png)
+
+# Problems
+
+## Unable to Connect
+A error message appears in DS-5 and the status LED of DSTREAM is red.
+![Unable to connect to Hello World](/img/problem0_00.png)
+![Unable to connect to Hello World](/img/problem0_02.png)
+
+In order to solve this problem, following steps are done:
+
+1. Disable Connection
+2. Power Off Board
+3. Set up new connection
+
+## Missing Analyze Data in Trace View
+
+DS-5 does not view time specific information regarding called functions after a
+trace. The second screenshot is taken from the [Debugger User
+Guide](/docs/debugger_user_guide_100953_0529_00_en.pdf).
+
+![Genode Trace View](/img/problem1_00.png)
+![Debugger user Guide Trace View](/img/problem1_01.png)
+
+## Unknown instruction address
+
+Due to unknown reasons, the trace view lists many messages regarding unknown
+instruction addresses. It is not clear, if this is a problem.
+
+![Genode Trace](/img/problem2_00.png)
+
+

hardware.md

@@ -0,0 +1,72 @@
+# DS-5
+<!-- FMC = FPGA Mezzanine Card (FMC) -->
+
+According to [Arm Developer][1] the TPIO lines from the Xilinx SoC must be routed out to the appropriate expansion header (for off-chip parallel trace).
+Proposed solution for the ZC702 can be found [here][2] and the Master answer record [here][3].
+From there one can find an example design for the ZED board, available [here][4].
+According to the [Arm DSTREAM User Guide][5] from the [DS-5 docs][6] using the Mictor cable should be enough for both debugging and tracing.
+
+# [Vivado Constraints][12]
+- Written in tcl
+- LOC => Location Constraints
+  > Places a logical element from the netlist to a site on the device
+
+- PACKAGE_PIN
+  > Specifies the location of a design port on a pin of the target device package.
+
+- IOSTANDARD
+  > IOSTANDARD sets an IO Standard to an I/O buffer instance.
+
+# Troubleshoot
+> Top module not set for fileset 'sources_1'.
+
+Right-click on the BD in the sources window and click "Generate HDL wrapper" - taken from [here][7].
+
+# Fix ZED Design
+Pin layout is different for ZC702 and ZED Board.
+According to the ZED board [schematics][8] (page 9) D21 and E21 connect to FMC_LA27 which is mapped to the J20 Connector on the MX105, instead of J16.
+See also the [schematics][9] of the ZC702 as reference (page 7).
+Therefore B15 should be used for PJTAG_TMS and C15 should be used for PJTAG_TCK instead.
+Additionally it makes sense to use B16 for PJTAG_TDI and B17 for PJTAG_TDO.
+As additional reference use the FMC XM105 [doc][10] and look at the J16 and J20 Connector.
+To understand the connection of the TRACE_DATA pins on (e.g. TRACE_DATA[0] -> PIN38 -> FMC_LA10_P), take a look at the [Mictor 38 pinouts documentation][11].
+
+# Wiring
+The PJTAG is routed to the J16 connector on the XM105 and must be connected to the J19 connector (which loops through to the Mictor connector):
+- TCK: J16-6 -> J19-4
+- TMS: J16-8 -> J19-9
+- TDI: J16-10 -> J19-7
+- TDO: J16-12 -> J19-6
+
+# Trace with DS-5
+Use pause instead of stop tracing, otherwise unknown address/instructions errors are observable.
+
+# Exkurs MIO und EMIO
+## MIO
+The I/O Peripherals (IOP) unit contains the data communication peripherals and communicates to external devices through a shared pool of up to 54 dedicated multiuse I/O (MIO) pins.
+These MIO pins are software-configurable to connect to any of the internal I/O peripherals and static memory controllers.
+If additional I/O pins beyond the 54 are required, it is possible to route these through the PL to the I/O associated with the PL.
+This feature is referred to as extendable multiplexed I/O (EMIO).
+
+## EMIO
+Extendable multiplexed I/O (EMIO) allows unmapped PS peripherals to access PL I/O.
+
+
+# Photos
+
+![Jumpers](/img/zedboard00.jpg)
+![Overview](/img/zedboard01.jpg)
+
+
+[1]: https://developer.arm.com/docs/137812646/latest/using-ds-5-with-xilinx-zynq-7000-devices
+[2]: https://www.xilinx.com/support/answers/46915.html
+[3]: https://www.xilinx.com/support/answers/50863.html
+[4]: https://www.xilinx.com/support/answers/52095.html
+[5]: https://static.docs.arm.com/100955/0529/arm_ds5_arm_dstream_user_guide_100955_0529_00_en.pdf
+[6]: https://developer.arm.com/products/software-development-tools/ds-5-development-studio/docs
+[7]: https://forums.xilinx.com/t5/Welcome-Join/Error-Common-17-70-Application-Exception/td-p/776328
+[8]: https://www.xilinx.com/support/documentation/university/XUP%20Boards/XUPZedBoard/documentation/ZedBoard_RevC.1_Schematic_130129.pdf
+[9]: https://www.xilinx.com/support/documentation/boards_and_kits/zc702_Schematic_xtp185_rev1_0.pdf
+[10]: https://www.xilinx.com/support/documentation/boards_and_kits/ug537.pdf
+[11]: https://developer.arm.com/docs/dui0499/latest/arm-dstream-target-interface-connections/the-mictor-38-connector-pinouts-and-interface-signals/mictor-38-pinouts
+[12]: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_2/ug903-vivado-using-constraints.pdf