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Zephyr opanamp rsc dev 1 #1

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Zephyr opanamp rsc dev 1 #1

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5297cc8
samples: subsystem/ipc/opanamp_rsc: Add imx8mp_evk cortex m7
alxlastur Sep 9, 2024
2975b02
samples: subsystem/ipc/opanamp_rsc: Add imx93_evk cortex m33
alxlastur Sep 9, 2024
8a4fdee
dts: arm: nxp_imx93_m33.dtsi: Add mailbox unit node mu1 in dtsi file
alxlastur Sep 9, 2024
3c385fb
samples: ipc: openamp_rsc: main_remote.c
alxlastur Sep 9, 2024
46903cd
linker: add resource table section general linker file
alxlastur Sep 9, 2024
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11 changes: 10 additions & 1 deletion drivers/ipm/ipm_imx.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright 2018,2023 NXP
* Copyright 2018,2023-2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand Down Expand Up @@ -108,7 +108,16 @@ static void imx_mu_isr(const struct device *dev)
int32_t i;
bool all_registers_full;

#if defined(CONFIG_SOC_MIMX9352)
status_reg = base->RSR;
status_reg = (status_reg >> MU_RSR_RF0_SHIFT)&0x00000007;
status_reg = (((status_reg>>MU_RSR_RF3_SHIFT)<<MU_RSR_RF0_SHIFT) |
((status_reg>>MU_RSR_RF2_SHIFT)<<MU_RSR_RF1_SHIFT) |
((status_reg>>MU_RSR_RF1_SHIFT)<<MU_RSR_RF2_SHIFT) |
((status_reg>>MU_RSR_RF0_SHIFT)<<MU_RSR_RF3_SHIFT));
#else
status_reg = base->SR >>= MU_SR_RFn_SHIFT;
#endif

for (id = CONFIG_IPM_IMX_MAX_ID_VAL; id >= 0; id--) {
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This should be a standalone patch explaining that MU register layout has changed or imx93 and we need to reverse the bits in order to work.

This would be the most problematic change to get in. but lets sending it like this and hope for the best.

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@alxlastur is it possible to do this change in NXP hal - in fsl_mu.c?
When taking the status_reg this should be already shifted for i.mx93.

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@iuliana-prodan , as far as I see I don't think so. The isr is defined in ipx_imx.c:
image
I see no ISR in fsl_mu.c or fsl_mu.h

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I was thinking to get the status register from fsl_mu by writing a function that does what you have above.
Here, like we have the MU_GetStatusFlags(), something like MU_GetStatusRegister().
I have to take a look on imx93 MU :)

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Yes. In this case it needs a MU_GetStatusRegister() that works for for all platforms. So MU_GetStatusRegister() should work for imx93 and imx8mp.

if (status_reg & 0x1U) {
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6 changes: 6 additions & 0 deletions dts/arm/nxp/nxp_imx93_m33.dtsi
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Expand Up @@ -95,6 +95,12 @@
clocks = <&ccm IMX_CCM_LPUART2_CLK 0x6c 24>;
status = "disabled";
};

mu1: mu1@44220000 {
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This should be mu1: mu@4422000....

compatible = "nxp,imx-mu";
reg = <0x44220000 DT_SIZE_K(64)>;
interrupts = <21 0>;
};
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This should be moved in the same patch with the one adding overlays for imx93 M33 core as it is a change related to DTS.

};
};

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9 changes: 9 additions & 0 deletions samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_m7.conf
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@@ -0,0 +1,9 @@
CONFIG_LOG_PRINTK=n
CONFIG_IPM_IMX_MAX_DATA_SIZE_16=n
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@dbaluta dbaluta Sep 10, 2024 •
edited
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Since 8mp support doesn't depend on other patches lets send this as a separate Pull request.

Commit message should look like this:

sample: open_amp_rsc_table: Add support for imx8mp_evk M7 core

This enables openamp_rsc_table sample for imx8mp_evk on M7 core

CONFIG_IPM_IMX_MAX_DATA_SIZE_4=y
CONFIG_OPENAMP_WITH_DCACHE=y
CONFIG_IPM_IMX_FW_READY_REPLY=y
CONFIG_LOG=y
CONFIG_LOG_BACKEND_UART=y
CONFIG_LOG_DEFAULT_LEVEL=0
CONFIG_LOG_MODE_MINIMAL=y
24 changes: 24 additions & 0 deletions samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_m7.overlay
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@@ -0,0 +1,24 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
chosen {
/*
* shared memory reserved for the inter-processor communication
*/
zephyr,ipc_shm = &shram;
zephyr,ipc = &mailbox0;
};

shram: memory@55000000 {
compatible = "mmio-sram";
reg = <0x55000000 0x500000>;
};
};

&mailbox0 {
status = "okay";
};
9 changes: 9 additions & 0 deletions samples/subsys/ipc/openamp_rsc_table/boards/imx93_evk_mimx9352_m33.conf
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Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
CONFIG_LOG_PRINTK=n
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Commit message here should be similiar with the one from 8mp_evk

CONFIG_IPM_IMX_MAX_DATA_SIZE_16=n
CONFIG_IPM_IMX_MAX_DATA_SIZE_4=y
CONFIG_OPENAMP_WITH_DCACHE=y
CONFIG_IPM_IMX_FW_READY_REPLY=y
CONFIG_LOG=y
CONFIG_LOG_BACKEND_UART=y
CONFIG_LOG_DEFAULT_LEVEL=0
CONFIG_LOG_MODE_MINIMAL=y
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add a newline here

25 changes: 25 additions & 0 deletions samples/subsys/ipc/openamp_rsc_table/boards/imx93_evk_mimx9352_m33.overlay
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@@ -0,0 +1,25 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
chosen {
/*
* shared memory reserved for the inter-processor communication
*/
zephyr,ipc_shm = &shram;
zephyr,ipc = &mu1;
};

shram: memory@A4000000 {
compatible = "mmio-sram";
reg = <0xA4000000 0x120000>;
};

mu1{
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add a space between mu1 and {

status = "okay";
};

};