GitHub - Mahekkumar-Varasada/pid-control-Algorithm-in-verilog: Developed a Verilog HDL-based PID control algorithm to enhance system stability, processing inputs like clock, reset, setpoint,feedback, and PID gains (Kp, Ki, Kd) to generate a control signal.

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Developed a Verilog HDL-based PID control algorithm to enhance system stability, processing inputs like clock, reset, setpoint,feedback, and PID gains (Kp, Ki, Kd) to generate a control signal.

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21BEC131_PID CONTROLLER USING VERILOG.pdf		21BEC131_PID CONTROLLER USING VERILOG.pdf
pid_control2.v		pid_control2.v
simulation_result..png		simulation_result..png

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Developed a Verilog HDL-based PID control algorithm to enhance system stability, processing inputs like clock, reset, setpoint,feedback, and PID gains (Kp, Ki, Kd) to generate a control signal.

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