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arch: riscv: smp: allow other IPI implementation #81256

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merged 1 commit into from
Nov 16, 2024

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@ycsin ycsin commented Nov 12, 2024

The currently IPI implementation assumes that CLINT exists in the system, however, that might not be the case as IPI can be implemented with PLIC that supports software-triggering as well, such as the Andes NCEPLIC100.

Refactor the CLINT-based IPI implementations into ipi_clint.c, and create Kconfig that selects the CLINT implementation when sifive-clint0 exists and enabled, otherwise default to RISCV_SMP_IPI_CUSTOM which allows OOT implementation. This also makes way for the upstreaming of non-clint IPI implementation later.

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ycsin commented Nov 12, 2024

Made this into a PR of its own as I think that this should go in regardless of the PR for ipi_plic implementation.

This is essentially a repackaged version of #65824, less the per-core init stuff.

@ycsin ycsin marked this pull request as ready for review November 12, 2024 05:28
@zephyrbot zephyrbot added the area: RISCV RISCV Architecture (32-bit & 64-bit) label Nov 12, 2024
@ycsin ycsin added the area: SMP Symmetric multiprocessing label Nov 12, 2024
The currently IPI implementation assumes that CLINT exists in the
system, however, that might not be the case as IPI can be implemented
with PLIC that supports software-triggering as well, such as the Andes
NCEPLIC100.

Refactor the CLINT-based IPI implementations into `ipi_clint.c`, and
create Kconfig that selects the CLINT implementation when
`sifive-clint0` exists and enabled, otherwise default to
`RISCV_SMP_IPI_CUSTOM` which allows OOT implementation. This also
makes way for the upstreaming of non-clint IPI implementation later.

Signed-off-by: Yong Cong Sin <[email protected]>
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@fkokosinski fkokosinski left a comment

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Decoupling clint from smp is definitely a huge positive, thanks for this

@nashif nashif merged commit 9c3482b into zephyrproject-rtos:main Nov 16, 2024
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@ycsin ycsin deleted the pr/riscv-ipi-plic-pre branch November 17, 2024 16:41
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8 participants