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drivers: i3c: Support I3C driver for STM32. #81190
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drivers: i3c: Support I3C driver for STM32. #81190
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i3c_shell.c
also needs updated
zephyr/drivers/i3c/i3c_shell.c
Line 82 in c50777a
DT_FOREACH_STATUS_OKAY(cdns_i3c, I3C_CTRL_FN) |
and
zephyr/drivers/i3c/i3c_shell.c
Line 96 in c50777a
DT_FOREACH_STATUS_OKAY(cdns_i3c, I3C_CTRL_LIST_ENTRY) |
@ExaltZephyr You should put your legal name in |
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Merge commit should be dropped.
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The title of each commit should reflect the path of where changes are introduced, see the main branch for examples.
Still not fixed. Without this your PR cannot be merged. |
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About Sign-off (
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Please do not resolve comments on your own, and let the original poster do it instead. |
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drivers/i3c/i3c_stm32.c
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LL_I3C_DisableStallParityData(i3c); | ||
LL_I3C_DisableStallTbit(i3c); | ||
LL_I3C_DisableHighKeeperSDA(i3c); | ||
LL_I3C_SetDataHoldTime(i3c, LL_I3C_SDA_HOLD_TIME_1_5); |
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Thinking more about this, This is related to the kernel clock input and meeting the required t_hd_pp time, and should be within i3c_stm32_config_ctrl_bus_char
... but I would expect some math behind it to determine if it should be 0.5 or 1.5. Is there a reason why you have it fixed to 1.5?
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According to the reference manual for the H5 board, the value of the minimum data hold time can be calculated as follows:
$t_{HDPP_{min}} = min(t_{CR}, t_{CF}) + 3ns$
We could not find how the
If you have any suggestion on how we can dynamically set these values according to the
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LGTM now... but it looks like there is an unrelated CI failure, you may need to rebase back on top of main
This commit adds the main DTS configurations required to enable I3C support on STM32. Signed-off-by: Mohammad Badawi <[email protected]> Signed-off-by: Sara Touqan <[email protected]>
This commit introduces support for the I3C driver on STM32, enabling functionality APIs for I3C controllers. Signed-off-by: Mohammad Badawi <[email protected]> Signed-off-by: Sara Touqan <[email protected]>
This commit introduces support for I3C shell on STM32. Signed-off-by: Mohammad Badawi <[email protected]> Signed-off-by: Sara Touqan <[email protected]>
This commit enables I3C support for STM32 nucleo_h563zi boards. Signed-off-by: Mohammad Badawi <[email protected]> Signed-off-by: Sara Touqan <[email protected]>
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This PR introduces support for the I3C driver on STM32, enabling functionality APIs for I3C controllers.