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STM32WB: add support for AES #63768

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merged 3 commits into from
Oct 20, 2023
Merged

STM32WB: add support for AES #63768

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b3a53de
drivers: crypto: add support for stm32wb family
hlukasz Oct 10, 2023
11f7e53
dts: arm: stm32: add AES1 peripheral to stm32wb family
hlukasz Oct 10, 2023
81f6816
boards: arm: nucleo_wb55rg: enable aes1
hlukasz Oct 10, 2023
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4 changes: 4 additions & 0 deletions boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -202,6 +202,10 @@ zephyr_udc0: &usb {
status = "okay";
};

&aes1 {
status = "okay";
};

&flash0 {
partitions {
compatible = "fixed-partitions";
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5 changes: 5 additions & 0 deletions drivers/crypto/crypto_stm32.c
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Expand Up @@ -43,8 +43,13 @@ LOG_MODULE_REGISTER(crypto_stm32);
#define STM32_RCC_CRYPTO_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
#define STM32_CRYPTO_TYPEDEF CRYP_TypeDef
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32_aes)
#if defined(CONFIG_SOC_SERIES_STM32WBX)
#define STM32_RCC_CRYPTO_FORCE_RESET __HAL_RCC_AES1_FORCE_RESET
#define STM32_RCC_CRYPTO_RELEASE_RESET __HAL_RCC_AES1_RELEASE_RESET
#else
#define STM32_RCC_CRYPTO_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
#define STM32_RCC_CRYPTO_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
#endif
#define STM32_CRYPTO_TYPEDEF AES_TypeDef
#endif

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8 changes: 8 additions & 0 deletions dts/arm/st/wb/stm32wb.dtsi
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Expand Up @@ -501,6 +501,14 @@
clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00040000>;
status = "disabled";
};

aes1: aes@50060000 {
compatible = "st,stm32-aes";
reg = <0x50060000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00010000>;
interrupts = <51 0>;
status = "disabled";
};
};

die_temp: dietemp {
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