driver: mcux_rgpio: enable runtime mmio configuration

Enable runtime mmio configuration in mcux_rgpio driver. Remove mmu region definition in mimx9/mmu_region.c Signed-off-by: Chekhov Ma <[email protected]>
zephyrproject-rtos · Dec 5, 2023 · 8ecff4d · 8ecff4d
1 parent 32feea8
commit 8ecff4d
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Showing 2 changed files with 26 additions and 21 deletions.
diff --git a/drivers/gpio/gpio_mcux_rgpio.c b/drivers/gpio/gpio_mcux_rgpio.c
@@ -24,10 +24,21 @@ struct gpio_pin_gaps {
 	uint8_t len;
 };
 
+#ifdef CONFIG_MMU
+/* Required by DEVICE_MMIO_NAMED_* macros */
+#define DEV_CFG(_dev) \
+	((const struct mcux_rgpio_config *)(_dev)->config)
+#define DEV_DATA(_dev) ((struct mcux_rgpio_data *)(_dev)->data)
+#endif /* CONFIG_MMU */
+
 struct mcux_rgpio_config {
 	/* gpio_driver_config needs to be first */
 	struct gpio_driver_config common;
+#ifdef CONFIG_MMU
+	DEVICE_MMIO_NAMED_ROM(reg_base);
+#else /* CONFIG_MMU */
 	RGPIO_Type *base;
+#endif /* CONFIG_MMU */
 #ifdef CONFIG_PINCTRL
 	const struct pinctrl_soc_pinmux *pin_muxes;
 	const struct gpio_pin_gaps *pin_gaps;
@@ -39,14 +50,21 @@ struct mcux_rgpio_config {
 struct mcux_rgpio_data {
 	/* gpio_driver_data needs to be first */
 	struct gpio_driver_data general;
+#ifdef CONFIG_MMU
+	DEVICE_MMIO_NAMED_RAM(reg_base);
+#endif /* CONFIG_MMU */
 	/* port ISR callback routine address */
 	sys_slist_t callbacks;
 };
 
 static inline RGPIO_Type* mcux_rgpio_get_base_addr(const struct device *dev)
 {
+#ifdef CONFIG_MMU
+	return (RGPIO_Type*)DEVICE_MMIO_NAMED_GET(dev, reg_base);
+#else /* CONFIG_MMU */
 	const struct mcux_rgpio_config *config = dev->config;
 	return config->base;
+#endif /* CONFIG_MMU */
 }
 
 static int mcux_rgpio_configure(const struct device *dev,
@@ -293,7 +311,11 @@ static const struct gpio_driver_api mcux_rgpio_driver_api = {
 		.common = {						\
 			.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\
 		},							\
-		.base = (RGPIO_Type *)DT_INST_REG_ADDR(n),		\
+		COND_CODE_1(CONFIG_MMU, ( \
+    	    DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)) /** true */ \
+    	), ( \
+    	    .base = (RGPIO_Type *) DT_INST_REG_ADDR(n) /** false */ \
+    	)), \
 		MCUX_RGPIO_PIN_INIT(n)					\
 	};								\
 									\
@@ -310,6 +332,9 @@ static const struct gpio_driver_api mcux_rgpio_driver_api = {
 									\
 	static int mcux_rgpio_##n##_init(const struct device *dev)	\
 	{								\
+		IF_ENABLED(CONFIG_MMU, ( \
+    	    DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP) \
+    	)); \
 		IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0),			\
 		   (MCUX_RGPIO_IRQ_INIT(n, 0);))		\
 									\

diff --git a/soc/arm64/nxp_imx/mimx9/mmu_regions.c b/soc/arm64/nxp_imx/mimx9/mmu_regions.c
@@ -44,26 +44,6 @@ static const struct arm_mmu_region mmu_regions[] = {
 			      DT_REG_ADDR(DT_NODELABEL(iomuxc)),
 			      DT_REG_SIZE(DT_NODELABEL(iomuxc)),
 			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),
-
-	MMU_REGION_FLAT_ENTRY("GPIO1",
-			      DT_REG_ADDR(DT_NODELABEL(gpio1)),
-			      DT_REG_SIZE(DT_NODELABEL(gpio1)),
-			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),
-
-	MMU_REGION_FLAT_ENTRY("GPIO2",
-			      DT_REG_ADDR(DT_NODELABEL(gpio2)),
-			      DT_REG_SIZE(DT_NODELABEL(gpio2)),
-			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),
-
-	MMU_REGION_FLAT_ENTRY("GPIO3",
-			      DT_REG_ADDR(DT_NODELABEL(gpio3)),
-			      DT_REG_SIZE(DT_NODELABEL(gpio3)),
-			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),
-
-	MMU_REGION_FLAT_ENTRY("GPIO4",
-			      DT_REG_ADDR(DT_NODELABEL(gpio4)),
-			      DT_REG_SIZE(DT_NODELABEL(gpio4)),
-			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),
 #if CONFIG_SOF
 	MMU_REGION_FLAT_ENTRY("MU2_A",
 			      DT_REG_ADDR(DT_NODELABEL(mu2_a)),