The project aims at designing a potentiometric digital-to-analog converter using end-to-end open-source EDA tools. The key idea is to design the IP to achieve specifications similar to the target specifications using osu180nm.
A computer is designed to work in a digital domain.In today's world, the existence of digital electronics is boundless.Despite such advancement,the world is yet analogous and this seems to be inevitable. Hence,there is a need for a bridge between the digital and analog domains.On that account,there comes a need for digital-to-analog and analog-to-digital converters.
With the advent of high performance digital circuits,the need for data converters with high speed and accuracy for a wide range of applications has drawn the attention of scientists and researchers worldwide.In this project we tried to design a potentiometric digital-to-analog converter.This repository consists of all the details required to design a potentiometric dac and know its characteristics. Digital to Analog converter(DAC) is a device that converts the digital signals to analog signals. It reconstructs the sampled data into an analog signal . The digital data might be produced from Field programmable gate array(FPGA) or a microprocessor or Application specific integrated circuit(ASIC) but in order to interact with the real world, the data requires conversion to analog signal.DAC converter have various architectures like Kelvin divider (String DAC), Segmented string DAC and Digital potentiometer (slightly modified Kelvin DAC).The slightly modified version of Kelvin DAC is the potentiometric DAC. The key idea is to design a 10 bit potentiometric DAC with 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference using osu180nm tech node. To develop an insight into the project and its specifications, download the pdac_IP pdf document uploaded in this repository. Also, to get better understanding of the IP read the potentiometric DAC file uploaded above.The dimentions of the designed IP are 333umX150um (widtheXheight).
| Name | No. | I/O | Description |
|---|---|---|---|
| D[0:9] | 1-10 | I | Digital inputs |
| EN | 11 | I | Enable pin |
| VDD | 12 | I | Digital power supply(1.8) |
| VSS | 13 | I | Digital ground |
| OUT | 14 | O | DAC analog voltage output |
| VDDA | 15 | I | Analog voltage supply (3.3) |
| VSSA | 16 | I | Analog ground |
| VREFH | 17 | I | Reference voltage high for DAC |
| VREFL | 18 | I | Reference voltage low for DAC |
| Parameter | Description | Min | Type | Max | Unit | Condition |
|---|---|---|---|---|---|---|
| RL | Load resistance | 50 | Mohm | T=-40 to 85C | ||
| CL | Load capacitance | 1 | pF | T=-40 to 85C | ||
| VDDA | Analog supply | 3.3 | V | T=-40 to 85C | ||
| VDD | Digital supply voltage | 1.8 | V | T=-40 to 85C | ||
| VREFH | Reference voltage high | 3.3 | V | T=-40 to 85C | ||
| VREFL | Reference voltage low | 0 | V | T=-40 to 85C | ||
| RES | Resolution | 10 | bit | T=27C | ||
| INL | Integral Non-linearity | 9.6 | LSB | T=27C | ||
| DNL | Differential non-linearity | -1.6 to +0.6 | LSB | T=27C |
- Integral nonlinearity (INL), also referred to as linearity error, is the maximum deviation of the output from the line between zero and full scale excluding the effects of zero code and full-scale errors. The INL is calculated for code 0-63.
- The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal 1LSB amplitude change of any two adjacent codes. The DNL is calculated for code 0-63.
- The target dimensions of the IP are 195.58X117.45 (widthXheight). The achieved dimensions are greater than the expected. We are looking into other ways of designing the layout like lclayout to give better results in terms of size.
- Due to the complexity of the circuit, the runtime is huge. Hence, for now INL and DNL are calculated for digital code 0-63. The values will be updated as and when they are found through simulation.
- The layout has to be verified in openroad to check the compatibilty of the designed IP.
- PNR is pending.
- Few parameters are yet to be updated.
LTSpice XVII-LTspice® is a high performance SPICE simulation software, schematic capture and waveform viewer with enhancements and models for easing the simulation of analog circuits.
Ngspice-ngspice is the open source spice simulator for electric and electronic circuits. Such a circuit may comprise of JFETs, bipolar and MOS transistors, passive elements like R, L, or C, diodes, transmission lines and other devices, all interconnected in a netlist.
Magic VLSI-Magic stands for Manhattan Artwork Generator for Integrated Circuits. It is a vlsi layout tool. As free and open-source software magic continuesto be a popular layout tool as it is easy to and expand for specilised tasks.
- It's not directly supported, so we need to download
WineHQ. Wine is a linux software that creates windows environment and allows you to run various windows programs. - Copy paste the commands mentioned below one after the other in the terminal for downloading and installing.
sudo dpkg --add-architecture i386
wget -O - https://dl.winehq.org/wine-builds/winehq.key | sudo apt-key add -
sudo add-apt-repository 'deb https://dl.winehq.org/wine-builds/ubuntu/ focal main'
sudo apt update
sudo apt install --install-recommends winehq-stable
- Download LTSpice.
- Click on
Download for Windows. - Install it by clicking on
-> next. - After installing , click on open with
WineHQ windows program loader.
LTSpiceis now installed and you can design the circuit```
- Just click on LTSpice and go to
Download LTSpice->Download for Windows. - Now click on the application ltspice from your
downloadsand accept and continue.
LTSpiceis now installed and you can design the circuit by opening it.
It’s Super Easy! simply click on Copy button to copy the command and paste into your command line terminal using built-in APT package manager.
- Run update command to update package repositories and get latest package information
sudo apt-get update -y - Run the install command with -y flag to quickly install the packages and dependencies
sudo apt-get install -y ngspice - Check the system logs to confirm that there are no related errors.
Note: -yflag means to assume yes and silently install, without asking you questions in most cases
Click on ngspice and go to Downloads->Download Latest Version.
ngspiceis now downloaded and ready to use
-
Download the magic.sh file
-
Copy paste the below commands one after another
cd Downloads/
chmod +x magic.sh
./magic.sh
Magic tool will be opened with minimum technology file by default. Follow below steps to open magic with osu180nm tech file.
-
Download the
osu180nm.techfile from the uploaded files. Copy and paste the entire content inText Editorand save it asosu180nm.tech. -
Open the Terminal and copy, paste the commands mentioned below.
sudo cp osu180nm.tech /usr/local/lib/magic/sys/
cd /usr/local/lib/magic/sys/
ls
cd
clear
-
You have successfully added osu180nm.tech file!
-
Just open the terminal and type
magic -T osu180nm.tech filename.magto begin layout.
Cloning a github repository creates a local copy of a remote repo and this allows us to make any changes to the files locally without affecting the main repository. To clone the IP onto your system copy paste the commands given below one after the other.
$ sudo apt install -y git
$ git clone https://github.com/VSD-DACteam/avsddac_3v3.git
$ cd avsddac_3v3/pre-layout
Note: Before you begin to simulate make sure that the model files i.e the .lib files uploaded in this respository are in the same directory that contains the .cir files.
All the details on how to design the schematics using LTspice have been mentioned in the README file of the folder 'pre-layout' of this repository.
To enter the Ngspice Shell, open the terminal & type:
$ ngspice
To simulate a netlist, type:
ngspice 1 -> source <filename>.cir
*note: Due to huge runtime, simulation is done for the first 64 digtal codes. This will be update as and when output for other codes is simulated.
note: The above graph is the hardcopy generated from ngspice. The staircase output is not clearly seen as the hardcopy distinguishes between various colors using dashed and dotted lines. To have a look at a better picture, please navigate to prelayout_plot uploaded in the repository.
You can exit from the Ngspice Shell by typing:
ngspice 1 -> quit
Open your terminal and change the working directory to the folder where your netlist file is saved. Run the netlist file using the following command.
$ ngspice 10bitdac.cir
The obtained graph shows the voltages outputs for first 64 values i.e digital code 0-62. Note down the displayed values which will be used for plotting vout/vref vs digital code graph using a plotting software. Here, SciDavis plotting software is used. The graph appears like the one shown below:
The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal 1LSB amplitude change of any two adjacent codes. Using the values noted earlier and the formula given below find all the DNL values. These vaues are uploaded in the repository with the name DNL.
DNL(LSB)= (Actual height- Ideal height)/1LSB
The DNL vs digital code graph is shown below:
The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation of the output from the line between zero and full scale excluding the effects of zero code and full-scale errors.
INL(LSB)= (Actual vout-Reference vout)/1LSB
The INL vs Digital code graph is shown below:
Now to open Magic and start designing the layout, paste the below command in the terminal
$ magic -T osu180nm.tech filename.mag
This creates a .mag file to design your layout. DAC requires hierarchial designing i.e we have create instances of lower level blocks to built an overall dac. To create an instance type in the following command in the tkcon window that open along with the magic layout window.
getcell blockname.mag
After the layout is designed, it is time to save the layout. Use the below command to save layout
save filename.mag
To generate the netlist use the following commands in the magic interpreter.
extract all
ext2spice -cthresh -rthresh filename.ext
This saves a file with the extention .spice which is our required netlist.
To exit from magic, use the following command in tkcon window
quit
The picture below shows the layout of a 10bit potentiometricdigital-to-analog converter
Once the magic file is extrated to spice, a .spice file is created. Copy the data from this file and create a separate document with .sp extention. Now, add voltage sources and transient alaysis statement and the control statements . This is now ready for simulation. Similar to what has been done with pre-layout, open ngspice and run the .sp file. Copy and paste the commands given below one by one in the terminal.
$ ngspice
$ source filename.sp
Now, note the values displayed and follow a similar process given for pre-layout simulation and plot in SciDavis.
The graph below shows post-layout Vout/Vref Vs digital code chaacteristics for the 0-64.
The below graph shows the DNL values for the digital code ranging from 0-63.
The plot shows the INL values for digital code ranging from 0-63.
| Parameter | pre-layout (LSB) | postlayout (LSB) |
|---|---|---|
| DNL | -1.6 to +0.6 | -1.5 to +0.59 |
| INL | +9.6 | +9.5 |
It can been seen that both the pre-layout and post-layout characteristics for 0-63 digital code are in good match.
For any support, please contact the administrator or report in issues in Github.
Bellana Avinash Naidu, Neelam Buddhiram Chaurasiya, Jayasri Veeravilli
- Bellana Avinash, B.Tech, NIT Rourkela, [email protected]
- Neelam Buddhiram Chaurasiya, BE-Degree, VESIT Mumbai, [email protected]
- Jayasri Veeravilli, B.Tech, SRM University, [email protected]
- Kunal Ghosh, Director, VSD Corp. Pvt. Ltd. [email protected]
- Philipp Gühring, Software Architect, LibreSilicon Assocation [email protected]