update t2

beken_os/beken378/build/bk7231n_ota.ld

@@ -98,15 +98,17 @@ SECTIONS
         *(.text.portDISABLE_IRQ)
         *(.text.vPortEnterCritical)
         *(.text.vPortExitCritical)
-	*(.text.flash_bypass_op_write)
+        *(.text.flash_bypass_op_write)
         *(.text.flash_bypass_op_read)
     } > itcm AT>flash
     _itcmcode_flash_begin = LOADADDR(.itcm.code);
     _itcmcode_ram_begin = ADDR(.itcm.code);
     _itcmcode_ram_end = _itcmcode_ram_begin + SIZEOF(.itcm.code);
 
-    . = ALIGN(0x8);
+
 /* code, instructions.for example: i=i+1; */
+
+    . = ALIGN(0x8);
 	.text : 
 	{
 	    *(.text)
@@ -125,13 +127,16 @@ SECTIONS
 		*(.rodata.*)
 		*(.gnu.linkonce.r*)
 	} > flash
-
+
+
+    __exidx_start = .;
 	.ARM.exidx :
 	{
 	    *(.ARM.exidx*)
 	    *(.gnu.linkonce.armexidx.*)
 	} > flash
-
+    __exidx_end = .;
+
     . = ORIGIN(tcm);
     .tcm ALIGN(8) :
     {
@@ -506,6 +511,18 @@ SECTIONS
 
 /* This symbol defines end of code/data sections. Heap starts here. */
 	PROVIDE(end    	  = .);
+
+	. = __exidx_end + SIZEOF(.data);
+	.ty_text_section ALIGN(0x8) :
+	{
+		_ty_section_start = .;
+		/* this is for c++ global constructor init */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP (*(SORT(*.init_array.*)))
+		KEEP (*(*.init_array*))
+		PROVIDE_HIDDEN (__init_array_end = .);
+	} >flash
+	ty_section_size = SIZEOF(.ty_text_section);
 }
  GROUP(
    libgcc.a

beken_os/beken378/driver/ble/ble.c

@@ -60,7 +60,7 @@ extern void rwnxl_reset_handle(int dummy);
 extern uint32_t ps_get_sleep_prevent(void);
 extern UINT32 txl_cntrl_pck_get(void );
 extern void sctrl_modem_core_reset(void);
-extern void delay(INT32 num);
+extern void bk_delay(INT32 num);
 extern void rw_main(void);
 extern void appm_update_param(struct gapc_conn_param *conn_param);
 
@@ -367,15 +367,15 @@ void ble_set_pn9_trx(uint32 param)
     {
         reg = 0x0;
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
-        delay(10);
+        bk_delay(10);
         reg = 0x2400;
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
     }
     else
     {
         reg = 0x0;
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
-        delay(10);
+        bk_delay(10);
         reg = 0x3800;
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
     }
@@ -418,7 +418,7 @@ UINT32 ble_ctrl( UINT32 cmd, void *param )
         reg = REG_READ(REG_BLE_XVR_TRX_CONFIG_ADDR);
         reg &= ~(1 << REG_BLE_XVR_TEST_RADIO_POST);
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
-        delay(10);
+        bk_delay(10);
         reg |= (1 << REG_BLE_XVR_TEST_RADIO_POST);
         REG_WRITE(REG_BLE_XVR_TRX_CONFIG_ADDR, reg);
         break;

beken_os/beken378/driver/ble/ble_pub/plf/refip/src/bim/bim_app.c

@@ -11,7 +11,7 @@
 
 typedef void (*FUNCPTR)(void);
 
-void delay(uint32_t t)
+void bk_delay(uint32_t t)
 {
 	for(int i  = 1000;i> 0;i--)
 	{

beken_os/beken378/driver/phy/phy_trident.c

@@ -2207,7 +2207,7 @@ void phy_agc_reset(void)
     mdm_reg |= MDM_MDMSWRESET_BIT;
     mdm_swreset_set(mdm_reg);
 
-    delay(10);
+    bk_delay(10);
 
     mdm_reg = mdm_swreset_get();
     mdm_reg &= ~MDM_MDMSWRESET_BIT;

beken_os/beken378/driver/pwm/mcu_ps_timer.c

@@ -62,10 +62,10 @@ void ps_pwm_reconfig(UINT32 period, UINT8 clk_mux)
     //disable
 #if (CFG_SOC_NAME == SOC_BK7231)	
     ps_pwm_disable();
-    delay(5);
+    bk_delay(5);
     //new
     ps_pwm_set_period(period, clk_mux);
-    delay(1);
+    bk_delay(1);
     //reenable
     ps_pwm_enable();
 
@@ -76,7 +76,7 @@ void ps_pwm_reconfig(UINT32 period, UINT8 clk_mux)
     ps_pwm_set_period(period, clk_mux);
     //reenable
     ps_pwm_enable();
-    delay(5);
+    bk_delay(5);
 
     REG_WRITE(PWM_INTERRUPT_STATUS,0x3f);
 #endif
@@ -115,9 +115,9 @@ void ps_timer3_enable(UINT32 period)
     reg = REG_READ(TIMER3_5_CTL);
     reg &= (~TIMERCTL3_EN_BIT);
     REG_WRITE(TIMER3_5_CTL,reg);
-    delay(2);
+    bk_delay(2);
     REG_WRITE(TIMER3_CNT,period);
-    delay(2);
+    bk_delay(2);
     reg = REG_READ(TIMER3_5_CTL);
     reg |= (TIMERCTL3_EN_BIT);
     reg &= ~(0x7 << TIMERCTLB_INT_POSI);
@@ -158,9 +158,9 @@ UINT32 ps_timer3_disable(void)
     reg &= (~TIMERCTL3_EN_BIT);
     reg &= ~(0x7 << TIMERCTLB_INT_POSI);
     REG_WRITE(TIMER3_5_CTL,reg);
-    delay(2);
+    bk_delay(2);
     REG_WRITE(TIMER3_CNT,FCLK_DURATION_MS*32);
-    delay(2);
+    bk_delay(2);
     reg = REG_READ(TIMER3_5_CTL);
     reg |= (TIMERCTL3_EN_BIT);
     REG_WRITE(TIMER3_5_CTL,reg);

beken_os/beken378/driver/sdcard/sdcard.c

@@ -1026,10 +1026,10 @@ uint8 sd_clk_is_attached(void)
 {
     uint32 tmp, mask, param ;
     sdio_clk_config(0);
-    delay(1);
+    bk_delay(1);
     param = GPIO_CFG_PARAM(sd_clk_pin, GMODE_INPUT_PULLUP);
     sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
-    delay(5);
+    bk_delay(5);
     if(sddev_control(GPIO_DEV_NAME, CMD_GPIO_INPUT, &sd_clk_pin))
     {
         GLOBAL_INT_DECLARATION();
@@ -1047,7 +1047,7 @@ uint8 sd_clk_is_attached(void)
     {
         param = GPIO_CFG_PARAM(sd_clk_pin, GMODE_SECOND_FUNC_PULL_UP);
         sddev_control(GPIO_DEV_NAME, CMD_GPIO_CFG, &param);
-        delay(1);
+        bk_delay(1);
         sdio_clk_config(1);
         return SD_CARD_ONLINE;
     }

beken_os/beken378/driver/sys_ctrl/sys_ctrl.c

@@ -244,7 +244,7 @@ void sctrl_set_cpu_clk_dco(void)
 
     reg_val |= ((MCLK_FIELD_DCO&MCLK_MUX_MASK) << MCLK_MUX_POSI);
     reg_val |= HCLK_DIV2_EN_BIT;    
-    delay(10);
+    bk_delay(10);
     REG_WRITE(SCTRL_CONTROL, reg_val); 
     reg_val &= ~(MCLK_DIV_MASK << MCLK_DIV_POSI);
     REG_WRITE(SCTRL_CONTROL, reg_val);
@@ -887,7 +887,7 @@ void sctrl_mcu_sleep(UINT32 peri_clk)
     else
     {
         PS_DEBUG_DOWN_TRIGER;
-        delay(1);
+        bk_delay(1);
 #if PS_CLOSE_PERI_CLK
         /* close all peri clock*/
         ps_saves[0].peri_clk_cfg= REG_READ(ICU_PERI_CLK_PWD);        
@@ -901,7 +901,7 @@ void sctrl_mcu_sleep(UINT32 peri_clk)
 #endif
         WFI();              
     }
-    delay(5);
+    bk_delay(5);
 }
 UINT32 sctrl_mcu_wakeup(void)
 {
@@ -924,7 +924,7 @@ UINT32 sctrl_mcu_wakeup(void)
     else
     {
     	PS_DEBUG_BCN_TRIGER;   
-        delay(2);
+        bk_delay(2);
     	PS_DEBUG_BCN_TRIGER;   
 
         #if PS_CLOSE_PERI_CLK
@@ -1076,7 +1076,7 @@ void sctrl_subsys_reset(UINT32 cmd)
     if(reg)
     {
         REG_WRITE(reg, reset_word);
-        delay(10);
+        bk_delay(10);
         REG_WRITE(reg, 0);
     }
 
@@ -1247,7 +1247,7 @@ void sctrl_enter_rtos_idle_sleep(UINT32 peri_clk)
     reg &= ~(SLEEP_MODE_MASK << SLEEP_MODE_POSI);
     reg = reg | SLEEP_MODE_CFG_NORMAL_VOL_WORD;
     REG_WRITE(SCTRL_SLEEP, reg);  
-    delay(5);
+    bk_delay(5);
 }
 
 void sctrl_exit_rtos_idle_sleep(void)
@@ -1269,7 +1269,7 @@ void sctrl_exit_rtos_idle_sleep(void)
     reg |= (BLK_EN_26M_XTAL | BLK_EN_DPLL_480M | BLK_EN_XTAL2RF | BLK_EN_ANALOG_SYS_LDO);
     REG_WRITE(SCTRL_BLOCK_EN_CFG, reg); 	
 
-    delay(1);  //delay 1.1ms for 26MHz DCO clock. need change for other dco clock frequency
+    bk_delay(1);  //delay 1.1ms for 26MHz DCO clock. need change for other dco clock frequency
     sctrl_cali_dpll(0);
     /* dpll division reset release*/
     reg = REG_READ(SCTRL_CONTROL); 
@@ -1694,7 +1694,7 @@ void sctrl_enter_rtos_deep_sleep(PS_DEEP_CTRL_PARAM *deep_param)
     reg = reg | SLEEP_MODE_CFG_DEEP_WORD;
     REG_WRITE(SCTRL_SLEEP, reg);  
 
-    delay(5);
+    bk_delay(5);
 }
 
 RESET_SOURCE_STATUS sctrl_get_deep_sleep_wake_soure(void)
@@ -1827,7 +1827,7 @@ UINT32 sctrl_ctrl(UINT32 cmd, void *param)
 
     case CMD_SCTRL_NORMAL_WAKEUP:
         sctrl_hw_wakeup();
-        delay(50);
+        bk_delay(50);
         sctrl_rf_wakeup();
         break;
 #endif
@@ -1978,15 +1978,15 @@ UINT32 sctrl_ctrl(UINT32 cmd, void *param)
                      << MODEM_CORE_RESET_POSI);
         REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, reg);
 
-        delay(1);
+        bk_delay(1);
         reg = ret;
         REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, reg);
 
         /*resetting, and waiting for done*/
         reg = REG_READ(SCTRL_RESET);
         while(reg & MODEM_CORE_RESET_BIT)
         {
-            delay(10);
+            bk_delay(10);
             reg = REG_READ(SCTRL_RESET);
         }
         ret = SCTRL_SUCCESS;

beken_os/beken378/func/bk7011_cal/bk7231N_cal.c

@@ -2508,6 +2508,13 @@ void bk7011_set_rfcali_mode(int mode)
     os_printf("set rfcali_mode:%d\r\n", gcali_context.cali_mode);
 }
 
+char rx2_use_flag = 0;
+
+char get_rx2_flag(void)
+{
+    return rx2_use_flag;
+}
+
 UINT32 rwnx_cal_load_user_rfcali_mode(int *rfcali_mode)
 {
     #define RF_MODE_GPIO_ID                 (GPIO1)
@@ -2525,6 +2532,8 @@ UINT32 rwnx_cal_load_user_rfcali_mode(int *rfcali_mode)
 
     gpio_level = bk_gpio_input(RF_MODE_GPIO_ID);
 
+    rx2_use_flag = 1;
+
     second_func = GFUNC_MODE_UART2;
     gpio_ctrl(CMD_GPIO_ENABLE_SECOND, &second_func);
     GLOBAL_INT_RESTORE();

beken_os/beken378/func/bk7011_cal/bk7231N_cal.h

@@ -43,7 +43,7 @@ void delay05us(INT32 num);
 
 //#define DPDCALILEN				  256
 
-#define cpu_delay(val)            delay(MAX(1, val/100))
+#define cpu_delay(val)            bk_delay(MAX(1, val/100))
 #define DELAY1US				  100
 //#define DELAY05US				  1
 

beken_os/beken378/func/bk7011_cal/bk7231U_cal.h

@@ -30,7 +30,7 @@ void delay05us(INT32 num);
 
 //#define DPDCALILEN				  256
 
-#define cpu_delay(val)            delay(MAX(1, val/100))
+#define cpu_delay(val)            bk_delay(MAX(1, val/100))
 #define DELAY1US				  100
 //#define DELAY05US				  1
 

beken_os/beken378/func/bk7011_cal/bk7231_cal.h

@@ -38,7 +38,7 @@ void delay05us(INT32 num);
 #define SUMNUMBERS					4
 #define MINOFFSET			    	16
 
-#define cpu_delay(val)            delay(MAX(1, val/100))
+#define cpu_delay(val)            bk_delay(MAX(1, val/100))
 #define DELAY1US				  100
 
 #define cal_delay(val)            delay05us(MAX(1, val))	// 8us

beken_os/beken378/func/include/target_util_pub.h

@@ -1,7 +1,7 @@
 #ifndef _TARGET_UTIL_PUB_H_
 #define _TARGET_UTIL_PUB_H_
 
-extern void delay(INT32 num);
+extern void bk_delay(INT32 num);
 extern void delay_ms(UINT32 ms_count);
 extern void delay_sec(UINT32 ms_count);
 extern void delay_tick(UINT32 tick_count);

beken_os/beken378/func/misc/start_type.c

@@ -32,7 +32,7 @@ void bk_misc_crash_xat0_reboot(void)
     GLOBAL_INT_DISABLE();
 
     icu_ctrl(CMD_CLK_PWR_DOWN, (void *)&parameter);
-    delay(30000); //100ms
+    bk_delay(30000); //100ms
     wdt_ctrl(WCMD_SET_PERIOD, &wdt_val);
     icu_ctrl(CMD_CLK_PWR_UP, (void *)&parameter);
     while(1);

beken_os/beken378/func/misc/target_util.c

@@ -14,7 +14,7 @@
 				delay(10):about 125us
 				delay(100):about 850us
  */
-void delay(INT32 num)
+void bk_delay(INT32 num)
 {
     volatile INT32 i, j;
 
@@ -62,7 +62,7 @@ void delay_ms(UINT32 ms_count)
     ASSERT(clk);
 
     cell = 100 * clk / 26000000;
-    delay(ms_count * cell);
+    bk_delay(ms_count * cell);
 }
 
 /*