Benchmarks 2024 11 18 TVM GCC Os spike_rv32

Setup

Simulator

Spike (riscv-isa-sim ) (ISS, CPI=1)
- Spike : 0bc176b3fca43560b9e8586cdbc41cfde073e17a
- Spike PK : 7e9b671c0415dfd7b562ac934feb9380075d4aa2

Toolchains

RISC-V GCC:
- Scalar: riscv32-unknown-elf-gcc (gc891d8dc23e) 13.2.0
- Vector: riscv32-unknown-elf-gcc (gc891d8dc23e) 13.2.0
- Packed: Self compiled using patches found in https://github.com/riscv-collab/riscv-gcc/pull/258 and https://github.com/riscvarchive/riscv-binutils-gdb/pull/257

Models

MLPerfTiny Benchmark
TODO: others!

Frameworks

MLonMCU : develop
TVM : Nightly Pre-Build

Miscellaneous

Used -Os flag for compilation.
Benchmarks generated using MLonMCU deployment tool with minimal efforts.
Memory metrics are reported in Bytes

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv32 )

Audio Wake Words (`aww`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`31536155` ( 0.5x )	`106750` ( 1.269 )	`59468` ( 3.094 )	0	NCHW	TVM	Fallback	RV32GC	-
`29578399` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	0	NHWC	TVM	Fallback	RV32GC	-
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	128	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	256	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	512	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	1024	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	2048	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`31528951` ( 0.5x )	`106726` ( 1.268 )	`59468` ( 3.094 )	4096	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	128	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	256	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	512	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	1024	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	2048	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`29578395` ( 0.6x )	`100828` ( 1.198 )	`59468` ( 3.094 )	4096	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`16864599` ( Base )	`84138` ( Base )	`19220` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV32GC	-
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`16864599` ( 1.0x )	`84138` ( 1.0 )	`19220` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`5986530` ( 2.8x )	`85806` ( 1.02 )	`23684` ( 1.232 )	128	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4841418` ( 3.5x )	`85806` ( 1.02 )	`23684` ( 1.232 )	256	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4273754` ( 3.9x )	`85806` ( 1.02 )	`23684` ( 1.232 )	512	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4232042` ( 4.0x )	`85806` ( 1.02 )	`23684` ( 1.232 )	1024	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4232042` ( 4.0x )	`85806` ( 1.02 )	`23684` ( 1.232 )	2048	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4235431` ( 4.0x )	`85806` ( 1.02 )	`23684` ( 1.232 )	4096	NHWC	muRISCV-NN	Vector	RV32GCV	-

Image Classification (`resnet`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`132014110` ( 0.6x )	`215996` ( 1.619 )	`108380` ( 1.952 )	0	NCHW	TVM	Fallback	RV32GC	-
`115762181` ( 0.7x )	`206902` ( 1.551 )	`108380` ( 1.952 )	0	NHWC	TVM	Fallback	RV32GC	-
`132147480` ( 0.6x )	`215986` ( 1.619 )	`108380` ( 1.952 )	128	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`132147480` ( 0.6x )	`215986` ( 1.619 )	`108380` ( 1.952 )	256	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`132147480` ( 0.6x )	`215986` ( 1.619 )	`108380` ( 1.952 )	512	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`132147480` ( 0.6x )	`215986` ( 1.619 )	`108380` ( 1.952 )	1024	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`132147480` ( 0.6x )	`215984` ( 1.619 )	`108380` ( 1.952 )	2048	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`132147480` ( 0.6x )	`215984` ( 1.619 )	`108380` ( 1.952 )	4096	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206902` ( 1.551 )	`108380` ( 1.952 )	128	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206902` ( 1.551 )	`108380` ( 1.952 )	256	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206904` ( 1.551 )	`108380` ( 1.952 )	512	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206904` ( 1.551 )	`108380` ( 1.952 )	1024	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206902` ( 1.551 )	`108380` ( 1.952 )	2048	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`115762175` ( 0.7x )	`206902` ( 1.551 )	`108380` ( 1.952 )	4096	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`81013966` ( Base )	`133384` ( Base )	`55524` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV32GC	-
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`81013966` ( 1.0x )	`133384` ( 1.0 )	`55524` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`15497251` ( 5.2x )	`135408` ( 1.015 )	`55524` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV32GCV	-
`9810243` ( 8.3x )	`135408` ( 1.015 )	`55524` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV32GCV	-
`7216595` ( 11.2x )	`135408` ( 1.015 )	`55524` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV32GCV	-
`5951075` ( 13.6x )	`135408` ( 1.015 )	`55524` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV32GCV	-
`5009384` ( 16.2x )	`135408` ( 1.015 )	`55524` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV32GCV	-
`4758857` ( 17.0x )	`135408` ( 1.015 )	`55524` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV32GCV	-

Anomaly Detection (`toycar`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`3225018` ( 0.6x )	`578914` ( 1.843 )	`5556` ( 1.168 )	0	NCHW	TVM	Fallback	RV32GC	-
`3225018` ( 0.6x )	`578914` ( 1.843 )	`5556` ( 1.168 )	0	NHWC	TVM	Fallback	RV32GC	-
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	128	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	256	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	512	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	1024	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	2048	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	4096	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	128	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	256	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	512	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	1024	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	2048	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`3225018` ( 0.6x )	`578902` ( 1.843 )	`5556` ( 1.168 )	4096	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`1820395` ( Base )	`314180` ( Base )	`4756` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV32GC	-
`1820395` ( 1.0x )	`314180` ( 1.0 )	`4756` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`1820395` ( 1.0x )	`314180` ( 1.0 )	`4756` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`1820393` ( 1.0x )	`314174` ( 1.0 )	`4756` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`1820395` ( 1.0x )	`314180` ( 1.0 )	`4756` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`1820395` ( 1.0x )	`314180` ( 1.0 )	`4756` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`1820395` ( 1.0x )	`314180` ( 1.0 )	`4756` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`627568` ( 2.9x )	`315104` ( 1.003 )	`4756` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV32GCV	-
`509200` ( 3.6x )	`315104` ( 1.003 )	`4756` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV32GCV	-
`450016` ( 4.0x )	`315104` ( 1.003 )	`4756` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV32GCV	-
`420758` ( 4.3x )	`315098` ( 1.003 )	`4756` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV32GCV	-
`417076` ( 4.4x )	`315104` ( 1.003 )	`4756` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV32GCV	-
`415192` ( 4.4x )	`315104` ( 1.003 )	`4756` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV32GCV	-

Visual Wake Words (`vww`)

Cycles (Speedup)	Total ROM (rel.)	Total RAM (rel.)	VLEN	Layout	Kernels	Mode	Arch	Auto-Vectorization
`91784259` ( 0.5x )	`539726` ( 1.699 )	`180976` ( 2.113 )	0	NCHW	TVM	Fallback	RV32GC	-
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	0	NHWC	TVM	Fallback	RV32GC	-
`91780995` ( 0.5x )	`539634` ( 1.699 )	`180976` ( 2.113 )	128	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`91780995` ( 0.5x )	`539634` ( 1.699 )	`180976` ( 2.113 )	256	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`91780995` ( 0.5x )	`539632` ( 1.699 )	`180976` ( 2.113 )	512	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`91780995` ( 0.5x )	`539632` ( 1.699 )	`180976` ( 2.113 )	1024	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`91780995` ( 0.5x )	`539632` ( 1.699 )	`180976` ( 2.113 )	2048	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`91780995` ( 0.5x )	`539632` ( 1.699 )	`180976` ( 2.113 )	4096	NCHW	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	128	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	256	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	512	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	1024	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	2048	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`86081755` ( 0.6x )	`519282` ( 1.634 )	`180976` ( 2.113 )	4096	NHWC	TVM	Fallback	RV32GCV	Loop+SLP
`49806987` ( Base )	`317706` ( Base )	`85656` ( Base )	0	NHWC	muRISCV-NN	Scalar	RV32GC	-
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	128	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	256	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	512	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	1024	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	2048	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`49806987` ( 1.0x )	`317706` ( 1.0 )	`85656` ( 1.0 )	4096	NHWC	muRISCV-NN	Scalar	RV32GCV	Loop+SLP
`13603264` ( 3.7x )	`319678` ( 1.006 )	`85656` ( 1.0 )	128	NHWC	muRISCV-NN	Vector	RV32GCV	-
`10274636` ( 4.8x )	`319678` ( 1.006 )	`85656` ( 1.0 )	256	NHWC	muRISCV-NN	Vector	RV32GCV	-
`8985514` ( 5.5x )	`319678` ( 1.006 )	`85656` ( 1.0 )	512	NHWC	muRISCV-NN	Vector	RV32GCV	-
`8481015` ( 5.9x )	`319678` ( 1.006 )	`85656` ( 1.0 )	1024	NHWC	muRISCV-NN	Vector	RV32GCV	-
`8432401` ( 5.9x )	`319678` ( 1.006 )	`85656` ( 1.0 )	2048	NHWC	muRISCV-NN	Vector	RV32GCV	-
`8435790` ( 5.9x )	`319678` ( 1.006 )	`85656` ( 1.0 )	4096	NHWC	muRISCV-NN	Vector	RV32GCV	-

Original data

Click here to download the raw files for this benchmark.

2024-11-26

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-21

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-19

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-11-18

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-07-12

TFLM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

2024-06-29

TFLM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

TVM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

2024-03-02

TFLM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

TVM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

2024-02-26

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-23

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-22

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-20

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-11

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2023-12-22

TFLM

GCC

s

SpikeRV32

TVM

GCC

s

SpikeRV32

2024-11-26

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-21

TFLM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

TVM

GCC

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

LLVM

O3

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

Os

Spike (RV32) (spike_rv32)

Spike (RV32, Embedded) (spike_rv32_min)

Spike (RV64) (spike_rv64)

2024-11-19

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-11-18

TFLM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV32) (spike_rv32)

Spike (RV64) (spike_rv64)

2024-07-12

TFLM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

TVM

GCC

Os

Spike (RV64) (spike_rv64)

LLVM

Os

Spike (RV64) (spike_rv64)

2024-06-29

TFLM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

TVM

GCC

Os

SpikeRV32

LLVM

Os

SpikeRV32

2024-03-02

TFLM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

TVM

GCC

O3

SpikeRV32

Os

SpikeRV32

LLVM

O3

SpikeRV32

Os

SpikeRV32

2024-02-26

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-23

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-22

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-20

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2024-02-11

TFLM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

TVM

GCC

s

SpikeRV32

LLVM

s

SpikeRV32

2023-12-22

TFLM

GCC

s

SpikeRV32

TVM

GCC

s

SpikeRV32

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Benchmarks 2024 11 18 TVM GCC Os spike_rv32

Setup

Simulator

Toolchains

Models

Frameworks

Miscellaneous

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv32 )

Audio Wake Words (`aww`)

Image Classification (`resnet`)

Anomaly Detection (`toycar`)

Visual Wake Words (`vww`)

Original data

Clone this wiki locally

Benchmarks 2024 11 18 TVM GCC Os spike_rv32

Setup

Simulator

Toolchains

Models

Frameworks

Miscellaneous

Results (Framework: tvm, Backend: tvmaot, Toolchain: gcc, Flags: -Os, Target: spike_rv32 )

Audio Wake Words (aww)

Image Classification (resnet)

Anomaly Detection (toycar)

Visual Wake Words (vww)

Original data

Clone this wiki locally

Audio Wake Words (`aww`)

Image Classification (`resnet`)

Anomaly Detection (`toycar`)

Visual Wake Words (`vww`)