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[DNM] Switch to native Zephyr support for imx8MP #9608

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[DNM] Switch to native Zephyr support for imx8MP #9608

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00f17b3
imx8mp: Switch to native drivers and timer domain
dbaluta Oct 23, 2024
81f7f16
zephyr: dma: Add entries for SDMA3 and HOST_DMA nodes
dbaluta Oct 23, 2024
e042553
boards: overlay: Add overlay file for imx8mp
dbaluta Oct 23, 2024
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7 changes: 7 additions & 0 deletions app/boards/imx8mp_evk_mimx8ml8_adsp.conf
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Expand Up @@ -2,3 +2,10 @@ CONFIG_IMX8M=y
CONFIG_HAVE_AGENT=n
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n
CONFIG_DMA=y
CONFIG_DMA_NXP_SDMA=y
CONFIG_TRACE=n
CONFIG_SHARED_INTERRUPTS=y
CONFIG_ZEPHYR_NATIVE_DRIVERS=y
CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y
CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y
25 changes: 25 additions & 0 deletions app/boards/imx8mp_evk_mimx8ml8_adsp.overlay
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@@ -0,0 +1,25 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
host_dma: dma {
compatible = "nxp,sof-host-dma";
dma-channels = <32>;
#dma-cells = <0>;
};
};

&sdma3 {
status = "okay";
};

&sai3 {
rx-fifo-watermark = <65>;
tx-fifo-watermark = <65>;
fifo-depth = <128>;
rx-sync-mode = <1>;
status = "okay";
};
2 changes: 0 additions & 2 deletions src/drivers/imx/ipc.c
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Expand Up @@ -33,15 +33,13 @@

LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL);

#ifndef CONFIG_IMX8M
/* thanks to the fact that ARM's GIC is supported
* by Zephyr there's no need to clear interrupts
* explicitly. This should already be done by Zephyr
* after executing the ISR. This macro is used for
* linkage purposes on ARM64-based platforms.
*/
#define interrupt_clear(irq)
#endif /* CONFIG_IMX8M */

SOF_DEFINE_REG_UUID(ipc_task);

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1 change: 0 additions & 1 deletion src/platform/Kconfig
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Expand Up @@ -127,7 +127,6 @@ config IMX8M
select IMX
select IMX_SDMA
select IMX_MICFIL
select SCHEDULE_DMA_MULTI_CHANNEL
select IMX_INTERRUPT_IRQSTEER
help
Select if your target platform is imx8m-compatible
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2 changes: 1 addition & 1 deletion src/platform/imx8m/include/platform/platform.h
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Expand Up @@ -24,7 +24,7 @@ struct timer;
#define LPSRAM_SIZE 16384

/* IPC Interrupt */
#define PLATFORM_IPC_INTERRUPT IRQ_NUM_MU
#define PLATFORM_IPC_INTERRUPT 7
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#define PLATFORM_IPC_INTERRUPT_NAME NULL

/* Host page size */
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15 changes: 0 additions & 15 deletions src/platform/imx8m/platform.c
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Expand Up @@ -159,11 +159,6 @@ int platform_init(struct sof *sof)
sof->cpu_timers = sof->platform_timer;
#endif

#ifdef __ZEPHYR__
/* initialize cascade interrupts before any usage */
interrupt_init(sof);
#endif

platform_interrupt_init();
platform_clock_init(sof);
scheduler_init_edf();
Expand All @@ -186,16 +181,6 @@ int platform_init(struct sof *sof)
if (ret < 0)
return -ENODEV;

/* Init SDMA platform domain */
sof->platform_dma_domain =
dma_multi_chan_domain_init(&sof->dma_info->dma_array[1],
PLATFORM_NUM_DMACS - 1,
PLATFORM_DEFAULT_CLOCK, true);

/* i.MX platform DMA domain will be full synchronous, no time dependent */
sof->platform_dma_domain->full_sync = true;
scheduler_init_ll(sof->platform_dma_domain);

/* initialize the host IPC mechanims */
ipc_init(sof);

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30 changes: 15 additions & 15 deletions tools/topology/topology1/CMakeLists.txt
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Expand Up @@ -48,24 +48,24 @@ set(TPLGS
## end i.MX8 (i.MX8QM and i.MX8QXP) topologies

## i.MX8MP topologies
"sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8960-mixer\;-DCODEC=wm8960\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8962-mixer\;-DCODEC=wm8962\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960-mixer\;sof-imx8mp-wm8960-mixer\;-DCODEC=wm8960\;-DRATE=48000\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960-mixer\;sof-imx8mp-wm8962-mixer\;-DCODEC=wm8962\;-DRATE=48000\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8960-mixer\;-DCODEC=wm8960\;-DSAI_INDEX=3"
"sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8962-mixer\;-DCODEC=wm8962\;-DSAI_INDEX=3"
"sof-imx8-wm8960-mixer\;sof-imx8mp-wm8960-mixer\;-DCODEC=wm8960\;-DRATE=48000\;-DSAI_INDEX=3"
"sof-imx8-wm8960-mixer\;sof-imx8mp-wm8962-mixer\;-DCODEC=wm8962\;-DRATE=48000\;-DSAI_INDEX=3"
"sof-imx8mp-wm8960-kwd\;sof-imx8mp-wm8960-kwd"
"sof-imx8mp-micfil\;sof-imx8mp-micfil"
"sof-imx8mp-btsco-dual-8ch\;sof-imx8mp-btsco-dual-8ch"
"sof-imx8-wm8960\;sof-imx8mp-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-gui-components-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=gui-components\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-drc-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=drc\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-src-wm8960\;sof-imx8mp-src-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-src-wm8960\;sof-imx8mp-src-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3\;-DDMA_DOMAIN"
"sof-imx8-wm8960\;sof-imx8mp-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-gui-components-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=gui-components\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-drc-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=drc\;-DSAI_INDEX=3"
"sof-imx8-src-wm8960\;sof-imx8mp-src-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3"
"sof-imx8-src-wm8960\;sof-imx8mp-src-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3"
"sof-imx8mp-compr-pcm-wm8960\;sof-imx8mp-compr-pcm-wm8960"
"sof-imx8mp-compr-pcm-cap-wm8960\;sof-imx8mp-compr-pcm-cap-wm8960"
"sof-imx8mp-compr-wm8960\;sof-imx8mp-compr-wm8960\;-DCODEC=wm8960\;-DRATE=48000"
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9 changes: 1 addition & 8 deletions zephyr/CMakeLists.txt
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Expand Up @@ -324,25 +324,18 @@ endif()

if (CONFIG_SOC_MIMX8ML8_ADSP)
zephyr_library_sources(
${SOF_DRIVERS_PATH}/generic/dummy-dma.c
${SOF_DRIVERS_PATH}/imx/sdma.c
${SOF_DRIVERS_PATH}/imx/sai.c
${SOF_DRIVERS_PATH}/imx/ipc.c
${SOF_DRIVERS_PATH}/imx/micfil.c
${SOF_DRIVERS_PATH}/imx/interrupt-irqsteer.c
)

# Platform sources
zephyr_library_sources(
${SOF_PLATFORM_PATH}/imx8m/platform.c
${SOF_PLATFORM_PATH}/imx8m/lib/clk.c
${SOF_PLATFORM_PATH}/imx8m/lib/dai.c
${SOF_PLATFORM_PATH}/imx8m/lib/dma.c
)

# SOF core infrastructure - runs on top of Zephyr
zephyr_library_sources(
${SOF_SRC_PATH}/drivers/interrupt.c
lib/dma.c
)

zephyr_library_sources(${SOF_SRC_PATH}/schedule/zephyr_ll.c)
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1 change: 0 additions & 1 deletion zephyr/Kconfig
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Expand Up @@ -30,7 +30,6 @@ config SOF_ZEPHYR_STRICT_HEADERS

config DMA_DOMAIN
bool "Enable the usage of DMA domain."
default y if IMX8M
help
This enables the usage of the DMA domain in scheduling.

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5 changes: 2 additions & 3 deletions zephyr/include/rtos/interrupt.h
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Expand Up @@ -11,7 +11,7 @@
/* TODO: to be removed completely when the following platforms are switched
* to native drivers.
*/
#if defined(CONFIG_IMX8M) || defined(CONFIG_AMD)
#if defined(CONFIG_AMD)
/* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */
#include "../../../xtos/include/rtos/interrupt.h"
#else
Expand Down Expand Up @@ -49,8 +49,7 @@ static inline void interrupt_unregister(uint32_t irq, const void *arg)
static inline int interrupt_get_irq(unsigned int irq, const char *cascade)
{
#if defined(CONFIG_LIBRARY) || defined(CONFIG_ACE) || defined(CONFIG_CAVS) || \
defined(CONFIG_ZEPHYR_POSIX) || (defined(CONFIG_IMX) && !defined(CONFIG_IMX8M)) || \
defined(CONFIG_AMD)
defined(CONFIG_ZEPHYR_POSIX) || defined(CONFIG_IMX) || defined(CONFIG_AMD)
return irq;
#else
if (cascade == irq_name_level2)
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20 changes: 20 additions & 0 deletions zephyr/lib/dma.c
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Expand Up @@ -150,6 +150,26 @@ SHARED_DATA struct dma dma[] = {
.z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)),
},
#endif
#if defined(CONFIG_SOC_MIMX8ML8_ADSP)
{
.plat_data = {
.dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM,
.devs = DMA_DEV_SAI,
.channels = 32,
.period_count = 2,
},
.z_dev = DEVICE_DT_GET(DT_NODELABEL(sdma3)),
},
{
.plat_data = {
.dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM,
.devs = DMA_DEV_HOST,
.channels = 32,
.period_count = 2,
},
.z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)),
},
#endif /* CONFIG_SOC_MIMX8ML8_ADSP */
#ifdef CONFIG_SOC_MIMX8UD7_ADSP
{
.plat_data = {
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2 changes: 1 addition & 1 deletion zephyr/wrapper.c
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Expand Up @@ -53,7 +53,7 @@ const char irq_name_level2[] = "level2";
const char irq_name_level5[] = "level5";

/* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */
#if defined(CONFIG_IMX8M) || defined(CONFIG_AMD)
#if defined(CONFIG_AMD)
int interrupt_register(uint32_t irq, void(*handler)(void *arg), void *arg)
{
#ifdef CONFIG_DYNAMIC_INTERRUPTS
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