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nxp: imx93_a55: Switch to timer domain and Zephyr native drivers #8520

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Mar 25, 2024
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14 changes: 14 additions & 0 deletions app/boards/imx93_evk_mimx9352_a55.conf
Original file line number Diff line number Diff line change
Expand Up @@ -14,3 +14,17 @@ CONFIG_DCACHE_LINE_SIZE=64

CONFIG_IMX93_A55=y
CONFIG_TRACE=n

# DAI-related configurations
CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y
CONFIG_SAI_IMX93_ERRATA_051421=y

# DMA-related configurations
CONFIG_DMA=y
CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y

# needed because EDMA uses same interrupt for multiple
# channels.
CONFIG_SHARED_INTERRUPTS=y

CONFIG_ZEPHYR_NATIVE_DRIVERS=y
30 changes: 18 additions & 12 deletions app/boards/imx93_evk_mimx9352_a55.overlay
Original file line number Diff line number Diff line change
Expand Up @@ -24,18 +24,6 @@
reg = <0x42430000 DT_SIZE_K(64)>;
};

sai3: memory@42660000 {
reg = <0x42660000 DT_SIZE_K(64)>;
};

edma2_ch0: memory@42010000 {
reg = <0x42010000 DT_SIZE_K(32)>;
};

edma2_ch1: memory@42018000 {
reg = <0x42018000 DT_SIZE_K(32)>;
};

outbox: memory@ce100000 {
reg = <0xce100000 DT_SIZE_K(4)>;
};
Expand All @@ -58,4 +46,22 @@
host_ram: memory@80000000 {
reg = <0x80000000 DT_SIZE_M(1024)>;
};

host_dma: dma {
compatible = "nxp,sof-host-dma";
dma-channels = <32>;
#dma-cells = <0>;
};
};

&sai3 {
tx-fifo-watermark = <2>;
rx-fifo-watermark = <96>;
fifo-depth = <96>;
rx-sync-mode = <1>;
status = "okay";
};

&edma4 {
status = "okay";
};
1 change: 0 additions & 1 deletion src/platform/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -128,7 +128,6 @@ config IMX93_A55
select BUILD_OUTPUT_BIN
select ZEPHYR_LOG
select HOST_PTABLE
select DMA_DOMAIN
help
Select if your target platform is imx93-compatible.

Expand Down
6 changes: 0 additions & 6 deletions src/platform/imx93_a55/platform.c
Original file line number Diff line number Diff line change
Expand Up @@ -118,12 +118,6 @@ int platform_init(struct sof *sof)
if (ret < 0)
return -ENODEV;

/* Initialize DMA domain */
sof->platform_dma_domain = zephyr_dma_domain_init(&sof->dma_info->dma_array[0],
1,
PLATFORM_DEFAULT_CLOCK);
zephyr_ll_scheduler_init(sof->platform_dma_domain);

/* Initialize IPC */
ipc_init(sof);

Expand Down
4 changes: 2 additions & 2 deletions tools/topology/topology1/sof-imx93-wm8962.m4
Original file line number Diff line number Diff line change
Expand Up @@ -58,14 +58,14 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SAI, 3, sai3-wm8962,
PIPELINE_SOURCE_1, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# capture DAI is SAI1 using 2 periods
# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
2, SAI, 3, sai3-wm8962,
PIPELINE_SINK_2, 2, s32le,
1000, 0, 0)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)


# PCM Low Latency, id 0
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2 changes: 1 addition & 1 deletion west.yml
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ manifest:

- name: zephyr
repo-path: zephyr
revision: 8858a024c0151e3b4cd35262bed935248211d6b1
revision: 66b475a3aa4d73f4ddd5be5a7a1e0f3c7028e539
remote: zephyrproject

# Import some projects listed in zephyr/west.yml@revision
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6 changes: 1 addition & 5 deletions zephyr/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -323,16 +323,12 @@ if (CONFIG_SOC_MIMX9352_A55)
zephyr_library_sources(
${SOF_PLATFORM_PATH}/imx93_a55/platform.c
${SOF_PLATFORM_PATH}/imx93_a55/lib/clk.c
${SOF_PLATFORM_PATH}/imx93_a55/lib/dma.c
${SOF_PLATFORM_PATH}/imx93_a55/lib/dai.c
lib/dma.c
)

# Drivers
zephyr_library_sources(
${SOF_DRIVERS_PATH}/generic/dummy-dma.c
${SOF_DRIVERS_PATH}/imx/ipc.c
${SOF_DRIVERS_PATH}/imx/edma.c
${SOF_DRIVERS_PATH}/imx/sai.c
)

zephyr_library_sources(
Expand Down
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