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base_fw: sync time between host and fw for logging
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It is a general implementation for logging and it doesn't use intel
audio hardware feature like ART counter. 64bits timerstamp is needed
for accurate since the timestamp used by host is beyond 32bits in most
cases.

Signed-off-by: Rander Wang <[email protected]>
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RanderWang committed Nov 14, 2023
1 parent 529277f commit 8750270
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Showing 5 changed files with 25 additions and 0 deletions.
1 change: 1 addition & 0 deletions app/boards/intel_adsp_ace15_mtpm.conf
Original file line number Diff line number Diff line change
Expand Up @@ -90,3 +90,4 @@ CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y

CONFIG_PROBE=y
CONFIG_PROBE_DMA_MAX=2
CONFIG_LOG_TIMESTAMP_64BIT=y
1 change: 1 addition & 0 deletions app/boards/intel_adsp_ace20_lnl.conf
Original file line number Diff line number Diff line change
Expand Up @@ -75,3 +75,4 @@ CONFIG_COMP_KPB=y
CONFIG_COMP_ARIA=y
CONFIG_CLOCK_CONTROL_ADSP=y
CONFIG_CLOCK_CONTROL=y
CONFIG_LOG_TIMESTAMP_64BIT=y
1 change: 1 addition & 0 deletions app/boards/intel_adsp_cavs25.conf
Original file line number Diff line number Diff line change
Expand Up @@ -75,3 +75,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y
CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y

CONFIG_HEAP_MEM_POOL_SIZE=8192
CONFIG_LOG_TIMESTAMP_64BIT=y
1 change: 1 addition & 0 deletions app/boards/intel_adsp_cavs25_tgph.conf
Original file line number Diff line number Diff line change
Expand Up @@ -74,3 +74,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y
CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y

CONFIG_HEAP_MEM_POOL_SIZE=8192
CONFIG_LOG_TIMESTAMP_64BIT=y
21 changes: 21 additions & 0 deletions src/audio/base_fw.c
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include <zephyr/device.h>
#include <zephyr/drivers/counter.h>
#endif
#include <zephyr/logging/log_ctrl.h>

/* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */
#if defined(CONFIG_SOC_SERIES_INTEL_ACE) || defined(CONFIG_INTEL_ADSP_CAVS)
Expand All @@ -32,6 +33,7 @@ DECLARE_SOF_RT_UUID("basefw", basefw_comp_uuid, 0xe398c32, 0x5ade, 0xba4b,
DECLARE_TR_CTX(basefw_comp_tr, SOF_UUID(basefw_comp_uuid), LOG_LEVEL_INFO);

static struct ipc4_system_time_info global_system_time_info;
static uint64_t time_delta;

static int basefw_config(uint32_t *data_offset, char *data)
{
Expand Down Expand Up @@ -234,12 +236,22 @@ static int basefw_mem_state_info(uint32_t *data_offset, char *data)
return 0;
}

/* Assumed time interval between host sends timestamp and fw process it */
#define TIME_SETTING_LATENCY_NS 120000
static log_timestamp_t basefw_get_timestamp(void)
{
return k_cycle_get_64() + time_delta;
}

static uint32_t basefw_set_system_time(uint32_t param_id,
bool first_block,
bool last_block,
uint32_t data_offset,
const char *data)
{
uint64_t host_time;
uint64_t dsp_time;

/* TODO: configurate time to logging subsystem */
if (!(first_block && last_block))
return IPC4_INVALID_REQUEST;
Expand All @@ -252,6 +264,15 @@ static uint32_t basefw_set_system_time(uint32_t param_id,
global_system_time_info.dsp_time.val_l = (uint32_t)(current_dsp_time);
global_system_time_info.dsp_time.val_u = (uint32_t)(current_dsp_time >> 32);

/* use default timestamp if 64bit is not enabled since 64bit is necessary for host time */
if (!IS_ENABLED(CONFIG_LOG_TIMESTAMP_64BIT))
return IPC4_SUCCESS;

host_time = k_ns_to_cyc_ceil64(*(uint64_t *)data + TIME_SETTING_LATENCY_NS);
time_delta = host_time - current_dsp_time;
log_set_timestamp_func(basefw_get_timestamp,
sys_clock_hw_cycles_per_sec());

return IPC4_SUCCESS;
}

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