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src_lite: add module
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Addition of SRC Lite module,
which only supports a subset of conversions
supported by the SRC module.

48 -> 16kHz
44.1 -> 16 kHz
32 -> 16 kHz
44.1 -> 48

Signed-off-by: Fabiola Kwasowiec <[email protected]>
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fkwasowi committed Oct 17, 2023
1 parent d3b7e54 commit 7a4e75a
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Showing 9 changed files with 218 additions and 21 deletions.
1 change: 1 addition & 0 deletions app/boards/intel_adsp_ace15_mtpm.conf
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@ CONFIG_IPC_MAJOR_4=y

CONFIG_COMP_SRC=y
CONFIG_COMP_SRC_IPC4_FULL_MATRIX=y
CONFIG_COMP_SRC_LITE=y
CONFIG_COMP_DRC=y
CONFIG_COMP_CROSSOVER=y
CONFIG_COMP_MULTIBAND_DRC=y
Expand Down
12 changes: 12 additions & 0 deletions src/audio/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -126,6 +126,18 @@ config COMP_SRC
help
Select for SRC component

config COMP_SRC_LITE
bool "SRC_LITE component"
default y
help
Select for SRC_LITE component
which only supports a subset of conversions
supported by the SRC module:
48 -> 16kHz
44.1 -> 16 kHz
32 -> 16 kHz
44.1 -> 48

config COMP_STUBS
bool "Build all selected third-party (3P) components with stubs"
default n
Expand Down
22 changes: 22 additions & 0 deletions src/audio/src/coef/src_lite_ipc4_int32_define.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(c) 2023 Intel Corporation. All rights reserved.
*
*/

#ifndef __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__
#define __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__

/* SRC constants */
#define MAX_FIR_DELAY_SIZE 730
#define MAX_OUT_DELAY_SIZE 900
#define MAX_BLK_IN 80
#define MAX_BLK_OUT 40
#define NUM_IN_FS 16
#define NUM_OUT_FS 10
#define STAGE1_TIMES_MAX 32
#define STAGE2_TIMES_MAX 32
#define STAGE_BUF_SIZE 672
#define NUM_ALL_COEFFICIENTS 69224

#endif /* __SOF_AUDIO_COEFFICIENTS_SRC_SRC_IPC4_INT32_DEFINE_H__ */
44 changes: 44 additions & 0 deletions src/audio/src/coef/src_lite_ipc4_int32_table.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(c) 2023 Intel Corporation. All rights reserved.
*
*/

/** \cond GENERATED_BY_TOOLS_TUNE_SRC */

#ifndef __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__
#define __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__

/* SRC conversions */
#include "src_ipc4_int32_1_2_4535_5000.h"
#include "src_ipc4_int32_10_21_3455_5000.h"
#include "src_ipc4_int32_1_3_4535_5000.h"
#include "src_ipc4_int32_3_2_4535_5000.h"
#include "src_ipc4_int32_8_7_4535_5000.h"
#include "src_ipc4_int32_16_21_4535_5000.h"
#include "src_ipc4_int32_20_21_4167_5000.h"
#include "../src.h"
#include <stdint.h>

/* SRC table */
int32_t src_fir_one = 1073741824;
struct src_stage src_int32_1_1_0_0 = { 0, 0, 1, 1, 1, 1, 1, 0, -1, &src_fir_one };
struct src_stage src_int32_0_0_0_0 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, &src_fir_one };
int src_in_fs[3] = { 32000, 44100, 48000};
int src_out_fs[2] = {16000, 48000};


struct src_stage *src_table1[2][3] = {
{ &src_int32_1_2_4535_5000, &src_int32_10_21_3455_5000,
&src_int32_1_3_4535_5000 },
{ &src_int32_3_2_4535_5000, &src_int32_8_7_4535_5000, &src_int32_1_1_0_0 }
};

struct src_stage *src_table2[2][3] = {
{ &src_int32_1_1_0_0, &src_int32_16_21_4535_5000, &src_int32_1_1_0_0 },
{ &src_int32_1_1_0_0, &src_int32_20_21_4167_5000, &src_int32_1_1_0_0 }
};

#endif /* __SOF_AUDIO_COEFFICIENTS_SRC_src_IPC4_INT32_TABLE_H__ */

/** \endcond */
43 changes: 23 additions & 20 deletions src/audio/src/src.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,10 @@
#include "src.h"
#include "src_config.h"

#if SRC_SHORT || CONFIG_COMP_SRC_TINY
#ifdef SRC_LITE
#include "coef/src_lite_ipc4_int32_define.h"
#include "coef/src_lite_ipc4_int32_table.h"
#elif SRC_SHORT || CONFIG_COMP_SRC_TINY
#include "coef/src_tiny_int16_define.h"
#include "coef/src_tiny_int16_table.h"
#elif CONFIG_COMP_SRC_SMALL
Expand All @@ -64,20 +67,20 @@
LOG_MODULE_REGISTER(src, CONFIG_SOF_LOG_LEVEL);

/* Calculates the needed FIR delay line length */
static int src_fir_delay_length(struct src_stage *s)
int src_fir_delay_length(struct src_stage *s)
{
return s->subfilter_length + (s->num_of_subfilters - 1) * s->idm
+ s->blk_in;
}

/* Calculates the FIR output delay line length */
static int src_out_delay_length(struct src_stage *s)
int src_out_delay_length(struct src_stage *s)
{
return 1 + (s->num_of_subfilters - 1) * s->odm;
}

/* Returns index of a matching sample rate */
static int src_find_fs(int fs_list[], int list_length, int fs)
int src_find_fs(int fs_list[], int list_length, int fs)
{
int i;

Expand All @@ -89,7 +92,7 @@ static int src_find_fs(int fs_list[], int list_length, int fs)
}

/* Calculates buffers to allocate for a SRC mode */
static int src_buffer_lengths(struct comp_dev *dev, struct comp_data *cd,
int src_buffer_lengths(struct comp_dev *dev, struct comp_data *cd,
int nch)
{
struct src_stage *stage1;
Expand Down Expand Up @@ -172,13 +175,13 @@ static int src_buffer_lengths(struct comp_dev *dev, struct comp_data *cd,
return 0;
}

static void src_state_reset(struct src_state *state)
void src_state_reset(struct src_state *state)
{
state->fir_delay_size = 0;
state->out_delay_size = 0;
}

static int init_stages(struct src_stage *stage1, struct src_stage *stage2,
int init_stages(struct src_stage *stage1, struct src_stage *stage2,
struct polyphase_src *src, struct src_param *p,
int n, int32_t *delay_lines_start)
{
Expand Down Expand Up @@ -299,7 +302,7 @@ int src_fallback(struct comp_data *cd, struct sof_source *source,
}

/* Normal 2 stage SRC */
static int src_2s(struct comp_data *cd,
int src_2s(struct comp_data *cd,
struct sof_source *source, struct sof_sink *sink)
{
struct src_stage_prm s1;
Expand Down Expand Up @@ -401,7 +404,7 @@ static int src_2s(struct comp_data *cd,
}

/* 1 stage SRC for simple conversions */
static int src_1s(struct comp_data *cd, struct sof_source *source,
int src_1s(struct comp_data *cd, struct sof_source *source,
struct sof_sink *sink)
{
struct src_stage_prm s1;
Expand Down Expand Up @@ -441,7 +444,7 @@ static int src_1s(struct comp_data *cd, struct sof_source *source,
}

/* A fast copy function for same in and out rate */
static int src_copy_sxx(struct comp_data *cd, struct sof_source *source,
int src_copy_sxx(struct comp_data *cd, struct sof_source *source,
struct sof_sink *sink)
{
int frames = cd->param.blk_in;
Expand All @@ -468,7 +471,7 @@ void src_set_alignment(struct sof_source *source, struct sof_sink *sink)
sink_set_alignment_constants(sink, byte_align, frame_align_req);
}

static int src_verify_params(struct processing_module *mod)
int src_verify_params(struct processing_module *mod)
{
struct sof_ipc_stream_params *params = mod->stream_params;
struct comp_data *cd = module_get_private_data(mod);
Expand Down Expand Up @@ -505,7 +508,7 @@ static int src_verify_params(struct processing_module *mod)
return ret;
}

static bool src_get_copy_limits(struct comp_data *cd,
bool src_get_copy_limits(struct comp_data *cd,
struct sof_source *source,
struct sof_sink *sink)
{
Expand Down Expand Up @@ -549,7 +552,7 @@ static bool src_get_copy_limits(struct comp_data *cd,
return true;
}

static int src_params_general(struct processing_module *mod,
int src_params_general(struct processing_module *mod,
struct sof_source *source,
struct sof_sink *sink)
{
Expand Down Expand Up @@ -652,7 +655,7 @@ static int src_params_general(struct processing_module *mod,
return 0;
}

static int src_prepare(struct processing_module *mod,
int src_prepare(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks)
{
Expand All @@ -671,7 +674,7 @@ static int src_prepare(struct processing_module *mod,
}


static bool src_is_ready_to_process(struct processing_module *mod,
bool src_is_ready_to_process(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks)
{
Expand All @@ -680,7 +683,7 @@ static bool src_is_ready_to_process(struct processing_module *mod,
return src_get_copy_limits(cd, sources[0], sinks[0]);
}

static int src_process(struct processing_module *mod,
int src_process(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks)
{
Expand All @@ -697,21 +700,21 @@ static int src_process(struct processing_module *mod,
return cd->src_func(cd, sources[0], sinks[0]);
}

static int src_set_config(struct processing_module *mod, uint32_t config_id,
int src_set_config(struct processing_module *mod, uint32_t config_id,
enum module_cfg_fragment_position pos, uint32_t data_offset_size,
const uint8_t *fragment, size_t fragment_size, uint8_t *response,
size_t response_size)
{
return -EINVAL;
}

static int src_get_config(struct processing_module *mod, uint32_t config_id,
int src_get_config(struct processing_module *mod, uint32_t config_id,
uint32_t *data_offset_size, uint8_t *fragment, size_t fragment_size)
{
return -EINVAL;
}

static int src_reset(struct processing_module *mod)
int src_reset(struct processing_module *mod)
{
struct comp_data *cd = module_get_private_data(mod);

Expand All @@ -723,7 +726,7 @@ static int src_reset(struct processing_module *mod)
return 0;
}

static int src_free(struct processing_module *mod)
int src_free(struct processing_module *mod)
{
struct comp_data *cd = module_get_private_data(mod);

Expand Down
43 changes: 42 additions & 1 deletion src/audio/src/src.h
Original file line number Diff line number Diff line change
Expand Up @@ -184,7 +184,48 @@ int src_prepare_general(struct processing_module *mod,
int src_init(struct processing_module *mod);
int src_fallback(struct comp_data *cd, struct sof_source *source,
struct sof_sink *sink);

int src_fir_delay_length(struct src_stage *s);
int src_out_delay_length(struct src_stage *s);
int src_find_fs(int fs_list[], int list_length, int fs);
int src_buffer_lengths(struct comp_dev *dev, struct comp_data *cd,
int nch);
void src_state_reset(struct src_state *state);
int init_stages(struct src_stage *stage1, struct src_stage *stage2,
struct polyphase_src *src, struct src_param *p,
int n, int32_t *delay_lines_start);
int src_1s(struct comp_data *cd, struct sof_source *source,
struct sof_sink *sink);
int src_copy_sxx(struct comp_data *cd, struct sof_source *source,
struct sof_sink *sink);
int src_verify_params(struct processing_module *mod);

bool src_get_copy_limits(struct comp_data *cd,
struct sof_source *source,
struct sof_sink *sink);
int src_params_general(struct processing_module *mod,
struct sof_source *source,
struct sof_sink *sink);
int src_prepare(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks);
int src_2s(struct comp_data *cd,
struct sof_source *source, struct sof_sink *sink);

bool src_is_ready_to_process(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks);
int src_process(struct processing_module *mod,
struct sof_source **sources, int num_of_sources,
struct sof_sink **sinks, int num_of_sinks);

int src_set_config(struct processing_module *mod, uint32_t config_id,
enum module_cfg_fragment_position pos, uint32_t data_offset_size,
const uint8_t *fragment, size_t fragment_size, uint8_t *response,
size_t response_size);
int src_get_config(struct processing_module *mod, uint32_t config_id,
uint32_t *data_offset_size, uint8_t *fragment, size_t fragment_size);
int src_free(struct processing_module *mod);
int src_reset(struct processing_module *mod);
extern const struct sof_uuid src_uuid;
extern struct tr_ctx src_tr;

30 changes: 30 additions & 0 deletions src/audio/src/src_lite.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
// SPDX-License-Identifier: BSD-3-Clause
//
// Copyright(c) 2023 Intel Corporation. All rights reserved.

#include <rtos/init.h>
#include "src.h"
#include "src_config.h"

#define SRC_LITE 1

LOG_MODULE_REGISTER(src_lite, CONFIG_SOF_LOG_LEVEL);

static const struct module_interface src_lite_interface = {
.init = src_init,
.prepare = src_prepare,
.process = src_process,
.is_ready_to_process = src_is_ready_to_process,
.set_configuration = src_set_config,
.get_configuration = src_get_config,
.reset = src_reset,
.free = src_free,
};

DECLARE_SOF_RT_UUID("src_lite", src_lite_uuid, 0x33441051, 0x44CD, 0x466A,
0x83, 0xA3, 0x17, 0x84, 0x78, 0x70, 0x8A, 0xEA);

DECLARE_TR_CTX(src_lite_tr, SOF_UUID(src_lite_uuid), LOG_LEVEL_INFO);

DECLARE_MODULE_ADAPTER(src_lite_interface, src_lite_uuid, src_lite_tr);
SOF_MODULE_INIT(src_lite, sys_comp_module_src_lite_interface_init);
41 changes: 41 additions & 0 deletions tools/rimage/config/mtl.toml
Original file line number Diff line number Diff line change
Expand Up @@ -630,3 +630,44 @@ count = 25
pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]

# SRC lite module config
[[module.entry]]
name = "SRC_LITE"
uuid = "33441051-44CD-466A-83A3-178478708AEA"
affinity_mask = "0x1"
#instance_count = "10"
domain_types = "0"
load_type = "0"
module_type = "0x1F"
auto_start = "0"
sched_caps = [1, 0x00008000]

# pin = [dir, type, sample rate, size, container, channel-cfg]
pin = [0, 0, 0xffff, 0xc, 0x8, 0x05ff,
1, 0, 0xf6c9, 0xc, 0x8, 0x05ff]

# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
mod_cfg = [0, 0, 0, 0, 12832, 1365500, 0, 0, 0, 1365, 0,
1, 0, 0, 0, 12832, 2302300, 0, 0, 0, 2302, 0,
2, 0, 0, 0, 12832, 3218200, 0, 0, 0, 3218, 0,
3, 0, 0, 0, 12832, 4169700, 0, 0, 0, 4169, 0,
4, 0, 0, 0, 12832, 5095100, 0, 0, 0, 5095, 0,
5, 0, 0, 0, 12832, 6014800, 0, 0, 0, 6014, 0,
6, 0, 0, 0, 12832, 6963500, 0, 0, 0, 6963, 0,
7, 0, 0, 0, 12832, 7791000, 0, 0, 0, 7791, 0,
8, 0, 0, 0, 12832, 8843000, 0, 0, 0, 8843, 0,
9, 0, 0, 0, 12832, 9755100, 0, 0, 0, 9755, 0,
10, 0, 0, 0, 12832, 10726500, 0, 0, 0, 10726, 0,
11, 0, 0, 0, 12832, 11624100, 0, 0, 0, 11624, 0,
12, 0, 0, 0, 12832, 12518700, 0, 0, 0, 12518, 0,
13, 0, 0, 0, 12832, 13555000, 0, 0, 0, 13555, 0,
14, 0, 0, 0, 12832, 14144500, 0, 0, 0, 14144, 0,
15, 0, 0, 0, 12832, 15809800, 0, 0, 0, 15809, 0,
16, 0, 0, 0, 12832, 16749000, 0, 0, 0, 16749, 0,
17, 0, 0, 0, 12832, 18433500, 0, 0, 0, 18433, 0,
18, 0, 0, 0, 12832, 19425900, 0, 0, 0, 19425, 0,
19, 0, 0, 0, 12832, 20396900, 0, 0, 0, 20396, 0,
20, 0, 0, 0, 12832, 20881000, 0, 0, 0, 20881, 0,
21, 0, 0, 0, 12832, 23431000, 0, 0, 0, 23431, 0,
22, 0, 0, 0, 12832, 30471000, 0, 0, 0, 30471, 0]
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