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unset the interrupt when the divider is on after the first interrupt …
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…pulse
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stevej committed Oct 30, 2023
1 parent b7d4d0a commit a7773cf
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Showing 2 changed files with 37 additions and 4 deletions.
33 changes: 31 additions & 2 deletions src/test.py
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,6 @@ async def test_one_shot(dut):

@cocotb.test()
async def repeating_no_divider(dut):

dut._log.info("start")
clock = Clock(dut.clk, 10, units="us")
cocotb.start_soon(clock.start())
Expand Down Expand Up @@ -84,5 +83,35 @@ async def repeating_no_divider(dut):
dut.uio_in.value = 0x0 # unset we so we no longer configure registers.
await ClockCycles(dut.clk, 10)
dut._log.info("checking that interrupt is high")
assert dut.uo_out.value == 0b01000000
assert dut.uo_out.value == 0b1000_0000
await ClockCycles(dut.clk, 10)


@cocotb.test()
async def oneshot_divided(dut):
dut._log.info("start")
clock = Clock(dut.clk, 10, units="us")
cocotb.start_soon(clock.start())

# reset
dut._log.info("reset")
dut.rst_n.value = 0
await ClockCycles(dut.clk, 2)

dut.rst_n.value = 1

dut.uio_in.value = 0x80 # set we high and config_address to 0b00
dut.ui_in.value = 0x80 # set divider to on, repeating off
await ClockCycles(dut.clk, 2)

dut.uio_in.value = 0xC0 # set we high and config_address to 0b01
dut.ui_in.value = 0x00 # should not set temp_counter
await ClockCycles(dut.clk, 2)

dut.uio_in.value = 0xA0 # set we high and config_address to 0b10
dut.ui_in.value = 0x01 # wait one cycle, with a divider will be 10 cycles
await ClockCycles(dut.clk, 14)
dut.uio_in.value = 0x0 # unset we so we no longer configure registers.

dut._log.info("checking that interrupt is high")
assert dut.uo_out.value == 0b1100_1000
8 changes: 6 additions & 2 deletions src/tt_um_minipit_stevej.v
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ module tt_um_minipit_stevej (
reg [15:0] current_count;

// A counter to use when the divider is enabled
reg [8:0] divider_count;
reg [7:0] divider_count;

// uo_out is always a status byte
assign uo_out = {divider_on, counter_set, 1'b0, 1'b0, interrupting, 1'b0, 1'b0, 1'b0};
Expand Down Expand Up @@ -88,13 +88,17 @@ module tt_um_minipit_stevej (
`endif
current_count <= current_count + 1;
end

// todo: unset the interrupt
if (counter_set && (current_count == counter)) begin
// pull interrupt line high for one clock cycle
interrupting <= 1;
if (repeating) begin
current_count <= 0;
end
// on a rollover of divider_count, reset the interrupt
if (divider_on && (divider_count > 0)) begin
interrupting <= 0; // this is hokey.
end
end else begin
interrupting <= 0;
end
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