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improved README, default clauses
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stevej committed Oct 31, 2023
1 parent bcc1ffc commit 9d3468f
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5 changes: 4 additions & 1 deletion README.md
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Expand Up @@ -2,7 +2,7 @@

# Small Programmable Interrupt Timer

TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip! This is my submission for TinyTapeout 4 in early September 2023.
TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip! This is my submission for TinyTapeout 5 in early November 2023.

A programmable interrupt timer allows you to specify when a digital line is pulled high after a given number of clock ticks, the timer can either repeat or be one-shot.

Expand All @@ -13,6 +13,9 @@ TODO: how to configure the third register, the low byte of the counter.
## Starting the timer.
Configuring the third register is what starts the timer as the other two registers are optional. The default settings if the first register isn't set are to be a one-shot timer with no clock divider.

## RTL errata



# Want to see your own digital design taped out to an ASIC?
Go to https://tinytapeout.com for instructions!
8 changes: 4 additions & 4 deletions src/test.py
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Expand Up @@ -29,7 +29,7 @@ async def test_no_config(dut):


@cocotb.test()
async def test_one_shot(dut):
async def test_one_shot_no_divider(dut):
dut._log.info("start")
clock = Clock(dut.clk, 10, units="us")
cocotb.start_soon(clock.start())
Expand Down Expand Up @@ -80,16 +80,16 @@ async def repeating_no_divider(dut):
await ClockCycles(dut.clk, 2)

dut.uio_in.value = 0xA0 # set we high and config_address to 0b10
dut.ui_in.value = 0x0A
dut.ui_in.value = 0x0A # counter set to 10
await ClockCycles(dut.clk, 13)
dut._log.info("checking that interrupt is high")
assert dut.uo_out.value == 0b01001000
assert dut.uo_out.value == 0b0100_1000
assert dut.uio_out.value == 0b0000_0001

dut.uio_in.value = 0x0 # unset we so we no longer configure registers.
await ClockCycles(dut.clk, 11)
dut._log.info("checking that interrupt is high")
assert dut.uo_out.value == 0b01001000
assert dut.uo_out.value == 0b0100_1000
assert dut.uio_out.value == 0b0000_0001


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12 changes: 5 additions & 7 deletions src/tt_um_minipit_stevej.v
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Expand Up @@ -73,8 +73,7 @@ module tt_um_minipit_stevej (
current_count <= 0;
counter_set <= 1;
end
2'b11: begin // unused
end
default: begin end
endcase
end // end config logic

Expand All @@ -85,12 +84,11 @@ module tt_um_minipit_stevej (
current_count <= current_count + 1;
end
end else if (counter_set) begin
`ifdef FORMAL
assert(!divider_on);
`endif
current_count <= current_count + 1;
end else begin
current_count <= current_count;
end
// todo: unset the interrupt

if (counter_set && (current_count == counter)) begin
// pull interrupt line high for one clock cycle
interrupting <= 1;
Expand All @@ -99,7 +97,7 @@ module tt_um_minipit_stevej (
end
// on a rollover of divider_count, reset the interrupt
if (divider_on && (divider_count > 0)) begin
interrupting <= 0; // this is hokey.
interrupting <= 0;
end
end else begin
interrupting <= 0;
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