Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

asm: Delete .func/.endfunc directives #21

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open

asm: Delete .func/.endfunc directives #21

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 1 addition & 13 deletions aarch64-asm.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,7 @@

.macro asm_function function_name
.global \function_name
.type \function_name,%function
.func \function_name
.type \function_name,%function
\function_name:
DST .req x0
SRC .req x1
Expand All @@ -54,7 +53,6 @@ asm_function aligned_block_copy_ldpstp_x_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ldpstp_q_aarch64
0:
Expand All @@ -67,7 +65,6 @@ asm_function aligned_block_copy_ldpstp_q_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ldpstp_q_pf32_l2strm_aarch64
0:
Expand All @@ -82,7 +79,6 @@ asm_function aligned_block_copy_ldpstp_q_pf32_l2strm_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ldpstp_q_pf64_l2strm_aarch64
0:
Expand All @@ -96,7 +92,6 @@ asm_function aligned_block_copy_ldpstp_q_pf64_l2strm_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ldpstp_q_pf32_l1keep_aarch64
0:
Expand All @@ -111,7 +106,6 @@ asm_function aligned_block_copy_ldpstp_q_pf32_l1keep_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ldpstp_q_pf64_l1keep_aarch64
0:
Expand All @@ -125,7 +119,6 @@ asm_function aligned_block_copy_ldpstp_q_pf64_l1keep_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_fill_stp_x_aarch64
0:
Expand All @@ -137,7 +130,6 @@ asm_function aligned_block_fill_stp_x_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_fill_stp_q_aarch64
0:
Expand All @@ -147,7 +139,6 @@ asm_function aligned_block_fill_stp_q_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_fill_stnp_x_aarch64
0:
Expand All @@ -159,7 +150,6 @@ asm_function aligned_block_fill_stnp_x_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_fill_stnp_q_aarch64
0:
Expand All @@ -169,7 +159,6 @@ asm_function aligned_block_fill_stnp_q_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

asm_function aligned_block_copy_ld1st1_aarch64
0:
Expand All @@ -180,6 +169,5 @@ asm_function aligned_block_copy_ld1st1_aarch64
subs SIZE, SIZE, #64
bgt 0b
ret
.endfunc

#endif
24 changes: 0 additions & 24 deletions arm-neon.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@

.macro asm_function function_name
.global \function_name
.func \function_name
\function_name:
DST .req r0
SRC .req r1
Expand Down Expand Up @@ -66,7 +65,6 @@ asm_function aligned_block_read_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

/* Actually this calculates a sum of 32-bit values */
asm_function aligned_block_read_pf32_neon
Expand Down Expand Up @@ -97,7 +95,6 @@ asm_function aligned_block_read_pf32_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

/* Actually this calculates a sum of 32-bit values */
asm_function aligned_block_read_pf64_neon
Expand Down Expand Up @@ -127,7 +124,6 @@ asm_function aligned_block_read_pf64_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

/* Actually this calculates a sum of 32-bit values */
asm_function aligned_block_read2_neon
Expand Down Expand Up @@ -156,7 +152,6 @@ asm_function aligned_block_read2_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

/* Actually this calculates a sum of 32-bit values */
asm_function aligned_block_read2_pf32_neon
Expand Down Expand Up @@ -187,7 +182,6 @@ asm_function aligned_block_read2_pf32_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

/* Actually this calculates a sum of 32-bit values */
asm_function aligned_block_read2_pf64_neon
Expand Down Expand Up @@ -217,7 +211,6 @@ asm_function aligned_block_read2_pf64_neon
vpadd.u32 d31, d31, d31
vmov.u32 r0, d31[0]
bx lr
.endfunc

asm_function aligned_block_copy_neon
0:
Expand All @@ -226,7 +219,6 @@ asm_function aligned_block_copy_neon
subs SIZE, SIZE, #32
bgt 0b
bx lr
.endfunc

asm_function aligned_block_copy_unrolled_neon
vpush {d8-d15}
Expand All @@ -244,7 +236,6 @@ asm_function aligned_block_copy_unrolled_neon
bgt 0b
vpop {d8-d15}
bx lr
.endfunc

asm_function aligned_block_copy_pf32_neon
0:
Expand All @@ -254,7 +245,6 @@ asm_function aligned_block_copy_pf32_neon
subs SIZE, SIZE, #32
bgt 0b
bx lr
.endfunc

asm_function aligned_block_copy_unrolled_pf32_neon
vpush {d8-d15}
Expand All @@ -280,7 +270,6 @@ asm_function aligned_block_copy_unrolled_pf32_neon
bgt 0b
vpop {d8-d15}
bx lr
.endfunc

asm_function aligned_block_copy_pf64_neon
0:
Expand All @@ -292,7 +281,6 @@ asm_function aligned_block_copy_pf64_neon
subs SIZE, SIZE, #64
bgt 0b
bx lr
.endfunc

asm_function aligned_block_copy_unrolled_pf64_neon
vpush {d8-d15}
Expand All @@ -314,7 +302,6 @@ asm_function aligned_block_copy_unrolled_pf64_neon
bgt 0b
vpop {d8-d15}
bx lr
.endfunc

asm_function aligned_block_copy_backwards_neon
add SRC, SRC, SIZE
Expand All @@ -328,7 +315,6 @@ asm_function aligned_block_copy_backwards_neon
subs SIZE, SIZE, #32
bgt 0b
bx lr
.endfunc

asm_function aligned_block_copy_backwards_pf32_neon
add SRC, SRC, SIZE
Expand All @@ -343,7 +329,6 @@ asm_function aligned_block_copy_backwards_pf32_neon
subs SIZE, SIZE, #32
bgt 0b
bx lr
.endfunc

asm_function aligned_block_copy_backwards_pf64_neon
add SRC, SRC, SIZE
Expand All @@ -360,7 +345,6 @@ asm_function aligned_block_copy_backwards_pf64_neon
subs SIZE, SIZE, #64
bgt 0b
bx lr
.endfunc

asm_function aligned_block_fill_neon
vld1.8 {d0, d1, d2, d3}, [SRC]!
Expand All @@ -370,7 +354,6 @@ asm_function aligned_block_fill_neon
subs SIZE, SIZE, #64
bgt 0b
bx lr
.endfunc

asm_function aligned_block_fill_backwards_neon
add SRC, SRC, SIZE
Expand All @@ -383,7 +366,6 @@ asm_function aligned_block_fill_backwards_neon
subs SIZE, SIZE, #32
bgt 0b
bx lr
.endfunc

/* some code for older ARM processors */

Expand All @@ -398,7 +380,6 @@ asm_function aligned_block_fill_stm4_armv4
subs SIZE, SIZE, #64
bgt 0b
pop {r4-r12, pc}
.endfunc

asm_function aligned_block_fill_stm8_armv4
push {r4-r12, lr}
Expand All @@ -409,7 +390,6 @@ asm_function aligned_block_fill_stm8_armv4
subs SIZE, SIZE, #64
bgt 0b
pop {r4-r12, pc}
.endfunc

asm_function aligned_block_fill_strd_armv5te
push {r4-r12, lr}
Expand All @@ -426,7 +406,6 @@ asm_function aligned_block_fill_strd_armv5te
subs SIZE, SIZE, #64
bgt 0b
pop {r4-r12, pc}
.endfunc

asm_function aligned_block_copy_incr_armv5te
push {r4-r12, lr}
Expand All @@ -442,7 +421,6 @@ asm_function aligned_block_copy_incr_armv5te
stmia DST!, {r8-r11}
bgt 0b
pop {r4-r12, pc}
.endfunc

asm_function aligned_block_copy_wrap_armv5te
push {r4-r12, lr}
Expand All @@ -458,7 +436,6 @@ asm_function aligned_block_copy_wrap_armv5te
stmia DST!, {r8-r11}
bgt 0b
pop {r4-r12, pc}
.endfunc

asm_function aligned_block_copy_vfp
push {r4-r12, lr}
Expand All @@ -470,6 +447,5 @@ asm_function aligned_block_copy_vfp
bgt 0b
vpop {d8-d15}
pop {r4-r12, pc}
.endfunc

#endif
5 changes: 2 additions & 3 deletions mips-32.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@
.macro asm_function function_name
.global \function_name
.type \function_name, @function
.func \function_name
\function_name:
.endm

Expand Down Expand Up @@ -93,7 +92,7 @@ asm_function aligned_block_fill_pf32_mips32
2:
jr $ra
nop
.endfunc


/*
* void aligned_block_copy_pf32_mips32(int64_t *dst, int64_t *src, int size)
Expand Down Expand Up @@ -178,6 +177,6 @@ asm_function aligned_block_copy_pf32_mips32
lw $s7, 28($sp)
jr $ra
addi $sp, $sp, 32
.endfunc


#endif
Loading