SAR_ADC (Chile 2)

[papijou2433]

No description provided.

[msaligane]

@bmurmann Let's review the files but not merge yet. I think we will have some merge conflicts.

[bmurmann]

Some of the xschem symbols contain absolute paths, which makes the schematics non-portable and tough to review outside your personal setup (without modifying). Can you please fix all of these? Example: /foss/pdks/gf180mcuC/libs.tech/xschem/symbols/cap_mim_2p0fF.sym

[papijou2433]

Ok, we will be fixing the paths, thanks for reviewing the files!

[d-m-bailey]

Just a couple housekeeping comments.

1. You probably don't need to commit SAR_ADC/xschem/test/preamp_tb/untitled.sch
2. SAR_ADC/xschem/spice/strong_arm.sch and SAR_ADC/xschem/spice/strongarm.sch (and the corresponding symbols) are similarly named. Are they both used and necessary? Could they be combined?

[d-m-bailey]

Also, maybe a couple layout changes.

[RTimothyEdwards]

Some suggestions:
(1) Use XSCHEM_LIBRARY_PATH in your xschemrc file to keep the full path of components out of the files:

     set XSCHEM_LIBRARY_PATH {}
     append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
     append XSCHEM_LIBRARY_PATH :$env(PWD)
     append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
     append XSCHEM_LIBRARY_PATH :/foss/pdks/gf180mcuC/libs.tech/xschem

(2) Do not put TT_MODELS blocks inside the circuit schematics. When you want to test a circuit block, create a testbench for it, instantiate the symbol of the schematic you want to test, and put the TT_MODELS and other simulation information into the testbench schematic, not the circuit and subcircuit schematics.
(3) Please check the PDK variant being used. The C variant was used for the first open MPW but Global Foundries did not want us to use the thinner top metal, and so the D variant was created for all subsequent MPWs. Regardless, both variants define the 2fF/um^2 MiM capacitor, not the 1.5fF/um^2 MiM capacitor. Make sure you understand what process variant the shuttle run will be manufactured on, and use the appropriate devices accordingly.
(4) MiM capacitor dimensions have parameter names c_length and c_width, not L and W. This appears to be an issue with the device symbols provided upstream. I will try to resolve this with Stefan Schippers. You can correct for the error in the device instances, where the parameter names are just text values.
(5) If you use 3V devices, be aware that there is no support for 3V infrastructure (e.g., padframe I/O pads)

[RTimothyEdwards]

@msaligane : Please read my suggestions above and comment on the PDK variant intended to be used on this tapeout, and the power supply setup expected for testing, since the PDK did not come with any 3.3V support.

[RTimothyEdwards]

(6) Do not create multiple pins of the same name. You may label as many wires as you want, but for each unique net that is also a pin, there should only be one pin symbol. Otherwise, netlists generates a huge number of warnings (which may or may not be errors).

[d-m-bailey]

Some suggestions: (1) Use XSCHEM_LIBRARY_PATH in your xschemrc file to keep the full path of components out of the files:

     set XSCHEM_LIBRARY_PATH {}
     append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
     append XSCHEM_LIBRARY_PATH :$env(PWD)
     append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
     append XSCHEM_LIBRARY_PATH :/foss/pdks/gf180mcuC/libs.tech/xschem

Just a follow up here. Using

      append XSCHEM_LIBRARY_PATH :$env(PDK_PATH)/$env(PDK)/libs.tech/xschem

makes your xschemrc file portable too.

[papijou2433]

@RTimothyEdwards, We weren't aware of the 3.3V issue since we were using the standard cells, does this means that we should change the 3.3V transistor sizing to be adecuate for a 4.5-5.5V transistor?

[RTimothyEdwards]

@papijou2433 : If you intend to use the provided demonstration/prototype board, then you probably want to make your system 5V compatible, because switching out components on the board for 3.3V operation may be difficult.

[msaligane]

@papijou2433 In our TO the standard cells we used are 5v. But we used 5v and 3.3v devices : pfet_03v3, nfet_03v3

If I recall, in our last TO, we used:

gf180mcuC   =  METALS5 | MIM | THICKMET0P9 | HRPOLY1K 
MiM: 2.0fF/um2 option B

@RTimothyEdwards is this what will be used in MPW1?

[msaligane]

@papijou2433 I can merge this PR for now. But before that, please open a GitHub issue compiling all the feedback listed above or during our sync-up today. It helps with tracking things. Thanks!

[RTimothyEdwards]

@msaligane : It is possible to run the whole chip at 3.3V but I don't know that the existing development board is compatible with 3.3V operation (i.e., the FTDI, SPI flash, and other chips on the board). Technically, the padframe we have from GF is 5V on the pad and core sides. It can be run at lower voltage with a corresponding loss of speed.

[msaligane]

@RTimothyEdwards For this TO. We are planning to use custom-made PADs. But yes, it is possible to do so.